Searched refs:SIM_SCGC6_TPM1_MASK (Results 1 – 8 of 8) sorted by relevance
3840 #define SIM_SCGC6_TPM1_MASK (0x2000000U) macro3842 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_TPM1_SHIFT)) & SIM_SCGC6_TPM1_MASK)
6471 #define SIM_SCGC6_TPM1_MASK (0x2000000U) macro6473 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_TPM1_SHIFT)) & SIM_SCGC6_TPM1_MASK)
7044 #define SIM_SCGC6_TPM1_MASK 0x2000000u macro7047 …x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_TPM1_SHIFT))&SIM_SCGC6_TPM1_MASK)
20385 #define SIM_RD_SCGC6_TPM1(base) ((SIM_SCGC6_REG(base) & SIM_SCGC6_TPM1_MASK) >> SIM_SCGC6_TPM1_SHIF…20389 #define SIM_WR_SCGC6_TPM1(base, value) (SIM_RMW_SCGC6(base, SIM_SCGC6_TPM1_MASK, SIM_SCGC6_TPM1(val…
6400 #define SIM_SCGC6_TPM1_MASK (0x2000000U) macro6402 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_TPM1_SHIFT)) & SIM_SCGC6_TPM1_MASK)