Searched refs:SIM_SCGC6_DMAMUX_MASK (Results 1 – 17 of 17) sorted by relevance
3831 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro3833 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
12177 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro12183 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
6616 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro6618 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
6453 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro6455 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
21835 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro21841 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
7020 #define SIM_SCGC6_DMAMUX_MASK 0x2u macro7023 … (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_DMAMUX_SHIFT))&SIM_SCGC6_DMAMUX_MASK)
20271 #define SIM_RD_SCGC6_DMAMUX(base) ((SIM_SCGC6_REG(base) & SIM_SCGC6_DMAMUX_MASK) >> SIM_SCGC6_DMAMU…20275 #define SIM_WR_SCGC6_DMAMUX(base, value) (SIM_RMW_SCGC6(base, SIM_SCGC6_DMAMUX_MASK, SIM_SCGC6_DMAM…
6382 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro6384 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
19839 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro19845 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
22295 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro22301 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
21179 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro21185 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
23275 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro23281 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
22409 #define SIM_SCGC6_DMAMUX_MASK (0x2U) macro22415 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_DMAMUX_SHIFT)) & SIM_SCGC6_DMAMUX_MASK)
