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Searched refs:SIM_SCGC5_LPTMR_SHIFT (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3806 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
3807 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h12125 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
12130 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h6594 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
6595 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h6594 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
6595 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h6407 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
6408 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h21776 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
21781 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h6968 #define SIM_SCGC5_LPTMR_SHIFT 0 macro
6970 …CGC5_LPTMR(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_LPTMR_SHIFT))&SIM_SCGC…
DMKW40Z4_extension.h20004 …ne SIM_RD_SCGC5_LPTMR(base) ((SIM_SCGC5_REG(base) & SIM_SCGC5_LPTMR_MASK) >> SIM_SCGC5_LPTMR_SHIFT)
20005 #define SIM_BRD_SCGC5_LPTMR(base) (BME_UBFX32(&SIM_SCGC5_REG(base), SIM_SCGC5_LPTMR_SHIFT, SIM_SCGC…
20009 …BME_BFI32(&SIM_SCGC5_REG(base), ((uint32_t)(value) << SIM_SCGC5_LPTMR_SHIFT), SIM_SCGC5_LPTMR_SHIF…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h6336 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
6337 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h6407 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
6408 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h6968 #define SIM_SCGC5_LPTMR_SHIFT 0 macro
6970 …CGC5_LPTMR(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_LPTMR_SHIFT))&SIM_SCGC…
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h6968 #define SIM_SCGC5_LPTMR_SHIFT 0 macro
6970 …CGC5_LPTMR(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_LPTMR_SHIFT))&SIM_SCGC…
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h19752 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
19757 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h22229 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
22234 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h21092 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
21097 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h23209 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
23214 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h22350 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro
22355 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…