Searched refs:SIM_SCGC5_LPTMR_SHIFT (Results 1 – 17 of 17) sorted by relevance
3806 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro3807 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
12125 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro12130 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
6594 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro6595 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
6407 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro6408 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
21776 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro21781 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
6968 #define SIM_SCGC5_LPTMR_SHIFT 0 macro6970 …CGC5_LPTMR(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_LPTMR_SHIFT))&SIM_SCGC…
20004 …ne SIM_RD_SCGC5_LPTMR(base) ((SIM_SCGC5_REG(base) & SIM_SCGC5_LPTMR_MASK) >> SIM_SCGC5_LPTMR_SHIFT)20005 #define SIM_BRD_SCGC5_LPTMR(base) (BME_UBFX32(&SIM_SCGC5_REG(base), SIM_SCGC5_LPTMR_SHIFT, SIM_SCGC…20009 …BME_BFI32(&SIM_SCGC5_REG(base), ((uint32_t)(value) << SIM_SCGC5_LPTMR_SHIFT), SIM_SCGC5_LPTMR_SHIF…
6336 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro6337 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
19752 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro19757 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
22229 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro22234 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
21092 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro21097 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
23209 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro23214 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…
22350 #define SIM_SCGC5_LPTMR_SHIFT (0U) macro22355 …C5_LPTMR(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC5_LPTMR_SHIFT)) & SIM_SC…