Home
last modified time | relevance | path

Searched refs:SIM_FCFG2_MAXADDR0_SHIFT (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3882 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
3883 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
5489 #define SIM_FCFG2_MAXADDR_SHIFT SIM_FCFG2_MAXADDR0_SHIFT
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h12453 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
12454 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h6711 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
6712 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h14497 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
14498 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h6711 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
6712 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h15302 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
15303 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h15308 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
15309 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h6516 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
6517 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h22185 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
22188 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h7097 #define SIM_FCFG2_MAXADDR0_SHIFT 24 macro
7099 …G2_MAXADDR0(x) (((uint32_t)(((uint32_t)(x))<<SIM_FCFG2_MAXADDR0_SHIFT))&SIM_FCF…
DMKW40Z4_extension.h20739 …_FCFG2_MAXADDR0(base) ((SIM_FCFG2_REG(base) & SIM_FCFG2_MAXADDR0_MASK) >> SIM_FCFG2_MAXADDR0_SHIFT)
20740 #define SIM_BRD_FCFG2_MAXADDR0(base) (BME_UBFX32(&SIM_FCFG2_REG(base), SIM_FCFG2_MAXADDR0_SHIFT, SI…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h6445 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
6446 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h6516 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
6517 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h7097 #define SIM_FCFG2_MAXADDR0_SHIFT 24 macro
7099 …G2_MAXADDR0(x) (((uint32_t)(((uint32_t)(x))<<SIM_FCFG2_MAXADDR0_SHIFT))&SIM_FCF…
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h7097 #define SIM_FCFG2_MAXADDR0_SHIFT 24 macro
7099 …G2_MAXADDR0(x) (((uint32_t)(((uint32_t)(x))<<SIM_FCFG2_MAXADDR0_SHIFT))&SIM_FCF…
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h20087 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
20088 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h22561 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
22562 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h21427 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
21428 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h23541 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
23542 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h22723 #define SIM_FCFG2_MAXADDR0_SHIFT (24U) macro
22724 …_MAXADDR0(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR0_SHIFT)) & SIM_F…