| /hal_nxp-2.7.6/mcux/drivers/kinetis/ |
| D | fsl_i2c.c | 618 s2Reg = (uint8_t)(base->S2 & (~I2C_S2_DFEN_MASK)); in I2C_MasterInit()
619 base->S2 = s2Reg | I2C_S2_DFEN(masterConfig->enableDoubleBuffering); in I2C_MasterInit()
849 while ((0U == (base->S2 & I2C_S2_EMPTY_MASK)) && (0U != waitTimes)) in I2C_MasterStart()
858 while (0U == (base->S2 & I2C_S2_EMPTY_MASK)) in I2C_MasterStart()
911 while ((0U == (base->S2 & I2C_S2_EMPTY_MASK)) && (0U != waitTimes)) in I2C_MasterRepeatedStart()
920 while (0U == (base->S2 & I2C_S2_EMPTY_MASK)) in I2C_MasterRepeatedStart()
1766 tmpReg = (uint8_t)(base->S2 & (~I2C_S2_DFEN_MASK)); in I2C_SlaveInit()
1767 base->S2 = tmpReg | I2C_S2_DFEN(slaveConfig->enableDoubleBuffering); in I2C_SlaveInit()
|
| D | fsl_lpsci.c | 464 status_flag = base->S1 | ((uint32_t)(base->S2) << 8); in LPSCI_GetStatusFlags()
482 base->S2 = UART0_S2_LBKDIF_MASK; in LPSCI_ClearStatusFlags()
489 base->S2 = UART0_S2_RXEDGIF_MASK; in LPSCI_ClearStatusFlags()
|
| D | fsl_uart.c | 666 status_flag |= ((uint32_t)(base->S2) << 8); in UART_GetStatusFlags()
698 uint8_t reg = base->S2; in UART_ClearStatusFlags()
707 base->S2 = reg | (uint8_t)(mask >> 8); in UART_ClearStatusFlags()
|
| /hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
| D | fsl_clock.c | 103 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
|
| /hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
| D | fsl_clock.c | 75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
|
| D | MKL25Z4.h | 4467 __IO uint8_t S2; /**< UART Status Register 2, offset: 0x5 */ member
4706 __IO uint8_t S2; /**< UART Status Register 2, offset: 0x5 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
| D | fsl_clock.c | 75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
|
| D | MKW22D5.h | 7188 __IO uint8_t S2; /**< UART Status Register 2, offset: 0x5 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
| D | fsl_clock.c | 75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
|
| D | MKW24D5.h | 7188 __IO uint8_t S2; /**< UART Status Register 2, offset: 0x5 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
| D | fsl_clock.c | 57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
|
| /hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
| D | fsl_clock.c | 57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
|
| /hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
| D | fsl_clock.c | 57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
|
| D | MK22F51212.h | 13239 __IO uint8_t S2; /**< UART Status Register 2, offset: 0x5 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MK64F12/ |
| D | fsl_clock.c | 57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
|
| D | MK64F12.h | 23601 __IO uint8_t S2; /**< UART Status Register 2, offset: 0x5 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
| D | fsl_clock.c | 57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
|
| /hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
| D | fsl_clock.c | 57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
|
| /hal_nxp-2.7.6/mcux/devices/MK66F18/ |
| D | fsl_clock.c | 57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
|
| D | MK66F18.h | 16867 __I uint8_t S2; /**< MCG Status 2 Register, offset: 0x12 */ member
24552 __IO uint8_t S2; /**< UART Status Register 2, offset: 0x5 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
| D | MKW40Z4.h | 2690 __IO uint8_t S2; /**< I2C Status register 2, offset: 0xC */ member
2716 #define I2C_S2_REG(base) ((base)->S2)
|
| /hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
| D | MKW20Z4.h | 2690 __IO uint8_t S2; /**< I2C Status register 2, offset: 0xC */ member
2716 #define I2C_S2_REG(base) ((base)->S2)
|
| /hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
| D | MKW30Z4.h | 2690 __IO uint8_t S2; /**< I2C Status register 2, offset: 0xC */ member
2716 #define I2C_S2_REG(base) ((base)->S2)
|
| /hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
| D | MKW31Z4.h | 3179 __IO uint8_t S2; /**< I2C Status register 2, offset: 0xC */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
| D | MKW21Z4.h | 3108 __IO uint8_t S2; /**< I2C Status register 2, offset: 0xC */ member
|
