Home
last modified time | relevance | path

Searched refs:RTC_TCR_CIR_MASK (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3496 #define RTC_TCR_CIR_MASK (0xFF00U) macro
3498 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h11059 #define RTC_TCR_CIR_MASK (0xFF00U) macro
11061 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h6161 #define RTC_TCR_CIR_MASK (0xFF00U) macro
6163 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h12809 #define RTC_TCR_CIR_MASK (0xFF00U) macro
12811 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h6161 #define RTC_TCR_CIR_MASK (0xFF00U) macro
6163 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h13614 #define RTC_TCR_CIR_MASK (0xFF00U) macro
13616 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h13620 #define RTC_TCR_CIR_MASK (0xFF00U) macro
13622 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h6145 #define RTC_TCR_CIR_MASK (0xFF00U) macro
6147 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h19214 #define RTC_TCR_CIR_MASK (0xFF00U) macro
19218 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h6605 #define RTC_TCR_CIR_MASK 0xFF00u macro
6608 …IR(x) (((uint32_t)(((uint32_t)(x))<<RTC_TCR_CIR_SHIFT))&RTC_TCR_CIR_MASK)
DMKW40Z4_extension.h18631 #define RTC_RD_TCR_CIR(base) ((RTC_TCR_REG(base) & RTC_TCR_CIR_MASK) >> RTC_TCR_CIR_SHIFT)
18635 #define RTC_WR_TCR_CIR(base, value) (RTC_RMW_TCR(base, RTC_TCR_CIR_MASK, RTC_TCR_CIR(value)))
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h6074 #define RTC_TCR_CIR_MASK (0xFF00U) macro
6076 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h6145 #define RTC_TCR_CIR_MASK (0xFF00U) macro
6147 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h6605 #define RTC_TCR_CIR_MASK 0xFF00u macro
6608 …IR(x) (((uint32_t)(((uint32_t)(x))<<RTC_TCR_CIR_SHIFT))&RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h6605 #define RTC_TCR_CIR_MASK 0xFF00u macro
6608 …IR(x) (((uint32_t)(((uint32_t)(x))<<RTC_TCR_CIR_SHIFT))&RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h19698 #define RTC_TCR_CIR_MASK (0xFF00U) macro
19700 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h20671 #define RTC_TCR_CIR_MASK (0xFF00U) macro
20673 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h19543 #define RTC_TCR_CIR_MASK (0xFF00U) macro
19545 …) (((uint32_t)(((uint32_t)(x)) << RTC_TCR_CIR_SHIFT)) & RTC_TCR_CIR_MASK)