Home
last modified time | relevance | path

Searched refs:RFSHCTL1 (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-2.7.6/imx/devices/MCIMX7D/
DMCIMX7D_M4.h10562 …__IO uint32_t RFSHCTL1; /**< Refresh Control Register 1, offset: 0x… member
10654 #define DDRC_RFSHCTL1_REG(base) ((base)->RFSHCTL1)
/hal_nxp-2.7.6/mcux/devices/MIMX8MM6/
DMIMX8MM6_cm4.h7801 __IO uint32_t RFSHCTL1; /**< Refresh Control Register 1, offset: 0x54 */ member