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Searched refs:RCM_RPFW_RSTFLTSEL_MASK (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3300 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
3302 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h10540 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
10576 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h5854 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
5856 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h5854 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
5856 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h5502 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
5504 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h18755 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
18791 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h6096 #define RCM_RPFW_RSTFLTSEL_MASK 0x1Fu macro
6099 … (((uint8_t)(((uint8_t)(x))<<RCM_RPFW_RSTFLTSEL_SHIFT))&RCM_RPFW_RSTFLTSEL_MASK)
DMKW40Z4_extension.h17631 #define RCM_RD_RPFW_RSTFLTSEL(base) ((RCM_RPFW_REG(base) & RCM_RPFW_RSTFLTSEL_MASK) >> RCM_RPFW_RST…
17635 #define RCM_WR_RPFW_RSTFLTSEL(base, value) (RCM_RMW_RPFW(base, RCM_RPFW_RSTFLTSEL_MASK, RCM_RPFW_RS…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h5431 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
5433 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h5502 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
5504 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h6096 #define RCM_RPFW_RSTFLTSEL_MASK 0x1Fu macro
6099 … (((uint8_t)(((uint8_t)(x))<<RCM_RPFW_RSTFLTSEL_SHIFT))&RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h6096 #define RCM_RPFW_RSTFLTSEL_MASK 0x1Fu macro
6099 … (((uint8_t)(((uint8_t)(x))<<RCM_RPFW_RSTFLTSEL_SHIFT))&RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h18607 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
18643 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h19328 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
19364 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h19947 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
19983 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h20301 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
20337 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h19020 #define RCM_RPFW_RSTFLTSEL_MASK (0x1FU) macro
19056 … (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)