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Searched refs:PORT_GPCHR_GPWE_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3179 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
3181 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h10300 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
10306 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h5710 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
5712 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h12022 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
12028 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h5710 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
5712 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h12827 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
12833 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h12833 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
12839 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h5392 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
5394 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h18490 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
18496 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h5823 #define PORT_GPCHR_GPWE_MASK 0xFFFF0000u macro
5826 …) (((uint32_t)(((uint32_t)(x))<<PORT_GPCHR_GPWE_SHIFT))&PORT_GPCHR_GPWE_MASK)
DMKW40Z4_extension.h17223 #define PORT_WR_GPCHR_GPWE(base, value) (PORT_RMW_GPCHR(base, PORT_GPCHR_GPWE_MASK, PORT_GPCHR_GPWE…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h5321 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
5323 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h5392 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
5394 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h5823 #define PORT_GPCHR_GPWE_MASK 0xFFFF0000u macro
5826 …) (((uint32_t)(((uint32_t)(x))<<PORT_GPCHR_GPWE_SHIFT))&PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h5823 #define PORT_GPCHR_GPWE_MASK 0xFFFF0000u macro
5826 …) (((uint32_t)(((uint32_t)(x))<<PORT_GPCHR_GPWE_SHIFT))&PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h16953 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
16959 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h18156 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
18162 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h18293 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
18299 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h19129 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
19135 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h18780 #define PORT_GPCHR_GPWE_MASK (0xFFFF0000U) macro
18786 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWE_SHIFT)) & PORT_GPCHR_GPWE_MASK)