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Searched refs:PORT_GPCHR_GPWD_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3176 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
3178 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h10297 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
10299 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h5707 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
5709 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h12019 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
12021 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h5707 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
5709 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h12824 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
12826 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h12830 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
12832 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h5389 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
5391 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h18484 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
18488 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h5819 #define PORT_GPCHR_GPWD_MASK 0xFFFFu macro
5822 …) (((uint32_t)(((uint32_t)(x))<<PORT_GPCHR_GPWD_SHIFT))&PORT_GPCHR_GPWD_MASK)
DMKW40Z4_extension.h17205 #define PORT_WR_GPCHR_GPWD(base, value) (PORT_RMW_GPCHR(base, PORT_GPCHR_GPWD_MASK, PORT_GPCHR_GPWD…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h5318 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
5320 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h5389 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
5391 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h5819 #define PORT_GPCHR_GPWD_MASK 0xFFFFu macro
5822 …) (((uint32_t)(((uint32_t)(x))<<PORT_GPCHR_GPWD_SHIFT))&PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h5819 #define PORT_GPCHR_GPWD_MASK 0xFFFFu macro
5822 …) (((uint32_t)(((uint32_t)(x))<<PORT_GPCHR_GPWD_SHIFT))&PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h16950 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
16952 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h18153 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
18155 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h18290 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
18292 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h19126 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
19128 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h18777 #define PORT_GPCHR_GPWD_MASK (0xFFFFU) macro
18779 … (((uint32_t)(((uint32_t)(x)) << PORT_GPCHR_GPWD_SHIFT)) & PORT_GPCHR_GPWD_MASK)