| /hal_nxp-2.7.6/mcux/middleware/usb/device/ |
| D | usb_device_ehci.c | 755 if (0U == (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_PR_MASK)) in USB_DeviceEhciInterruptPortChange()
758 if (0U != (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_HSP_MASK)) in USB_DeviceEhciInterruptPortChange()
777 …if ((0U != ehciState->isSuspending) && (0U == (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_SU… in USB_DeviceEhciInterruptPortChange()
814 if (0U != (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_PR_MASK)) in USB_DeviceEhciInterruptReset()
854 if (0U != (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_SUSP_MASK)) in USB_DeviceEhciInterruptSuspend()
1306 ehciState->registerBase->PORTSC1 |= USB_PORTSC1_PFSC_MASK; in USB_DeviceEhciInit()
1696 ehciState->registerBase->PORTSC1 &= ~USBHS_PORTSC1_PHCD_MASK; in USB_DeviceEhciControl()
1697 ehciState->registerBase->PORTSC1 |= USBHS_PORTSC1_FPR_MASK; in USB_DeviceEhciControl()
1703 ehciState->registerBase->PORTSC1 &= ~USBHS_PORTSC1_FPR_MASK; in USB_DeviceEhciControl()
1720 ehciState->registerBase->PORTSC1 |= USBHS_PORTSC1_PHCD_MASK; in USB_DeviceEhciControl()
[all …]
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| /hal_nxp-2.7.6/mcux/devices/LPC55S28/ |
| D | LPC55S28.h | 26990 …__IO uint32_t PORTSC1; /**< Port Status and Control register, offset: 0x… member
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| /hal_nxp-2.7.6/mcux/devices/LPC55S69/ |
| D | LPC55S69_cm33_core0.h | 27622 …__IO uint32_t PORTSC1; /**< Port Status and Control register, offset: 0x… member
|
| D | LPC55S69_cm33_core1.h | 27622 …__IO uint32_t PORTSC1; /**< Port Status and Control register, offset: 0x… member
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| /hal_nxp-2.7.6/mcux/devices/LPC55S16/ |
| D | LPC55S16.h | 26614 …__IO uint32_t PORTSC1; /**< Port Status and Control register, offset: 0x… member
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| /hal_nxp-2.7.6/mcux/devices/MK66F18/ |
| D | MK66F18.h | 26540 …__IO uint32_t PORTSC1; /**< Port Status and Control Registers, offset: 0… member
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| /hal_nxp-2.7.6/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 41904 …__IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
41963 #define USB_PORTSC1_REG(base) ((base)->PORTSC1)
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 26129 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 28927 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT685S/ |
| D | MIMXRT685S_cm33.h | 36587 …__IO uint32_t PORTSC1; /**< Port Status and Control register, offset: 0x… member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 38385 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 38367 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 35489 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 44263 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 37897 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 46922 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 46848 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMX8MM6/ |
| D | MIMX8MM6_cm4.h | 50856 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1176/ |
| D | MIMXRT1176_cm7.h | 92486 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
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| D | MIMXRT1176_cm4.h | 93417 __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */ member
|
