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Searched refs:PLL1NDEC (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/LPC55S16/
Dfsl_clock.c1081 preDiv = SYSCON->PLL1NDEC & SYSCON_PLL1NDEC_NDIV_MASK; in findPll1PreDiv()
1609 Setup.pllndec = SYSCON->PLL1NDEC; in CLOCK_GetPLL1OutClockRate()
1824 SYSCON->PLL1NDEC = pSetup->pllndec; in CLOCK_SetPLL1Freq()
1825 SYSCON->PLL1NDEC = pSetup->pllndec | (1UL << SYSCON_PLL1NDEC_NREQ_SHIFT); /* latch */ in CLOCK_SetPLL1Freq()
Dsystem_LPC55S16.c134 preDiv = SYSCON->PLL1NDEC & SYSCON_PLL1NDEC_NDIV_MASK; in findPll1PreDiv()
DLPC55S16.h20546 __IO uint32_t PLL1NDEC; /**< PLL1 550m N divider, offset: 0x568 */ member
/hal_nxp-2.7.6/mcux/devices/LPC55S28/
Dfsl_clock.c1110 preDiv = SYSCON->PLL1NDEC & SYSCON_PLL1NDEC_NDIV_MASK; in findPll1PreDiv()
1752 SYSCON->PLL1NDEC = pSetup->pllndec; in CLOCK_SetPLL1Freq()
1753 SYSCON->PLL1NDEC = pSetup->pllndec | (1UL << SYSCON_PLL1NDEC_NREQ_SHIFT); /* latch */ in CLOCK_SetPLL1Freq()
Dsystem_LPC55S28.c133 preDiv = SYSCON->PLL1NDEC & SYSCON_PLL1NDEC_NDIV_MASK; in findPll1PreDiv()
DLPC55S28.h20265 __IO uint32_t PLL1NDEC; /**< PLL1 550m N divider, offset: 0x568 */ member
/hal_nxp-2.7.6/mcux/devices/LPC55S69/
Dfsl_clock.c1110 preDiv = SYSCON->PLL1NDEC & SYSCON_PLL1NDEC_NDIV_MASK; in findPll1PreDiv()
1752 SYSCON->PLL1NDEC = pSetup->pllndec; in CLOCK_SetPLL1Freq()
1753 SYSCON->PLL1NDEC = pSetup->pllndec | (1UL << SYSCON_PLL1NDEC_NREQ_SHIFT); /* latch */ in CLOCK_SetPLL1Freq()
Dsystem_LPC55S69_cm33_core1.c134 preDiv = SYSCON->PLL1NDEC & SYSCON_PLL1NDEC_NDIV_MASK; in findPll1PreDiv()
Dsystem_LPC55S69_cm33_core0.c134 preDiv = SYSCON->PLL1NDEC & SYSCON_PLL1NDEC_NDIV_MASK; in findPll1PreDiv()
DLPC55S69_cm33_core0.h20865 __IO uint32_t PLL1NDEC; /**< PLL1 550m N divider, offset: 0x568 */ member
DLPC55S69_cm33_core1.h20865 __IO uint32_t PLL1NDEC; /**< PLL1 550m N divider, offset: 0x568 */ member