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Searched refs:PE2 (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_llwu.c41 regBase = &base->PE2; in LLWU_SetExternalWakeupPinMode()
67 regBase = &base->PE2; in LLWU_SetExternalWakeupPinMode()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h1666 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h3011 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
3034 #define LLWU_PE2_REG(base) ((base)->PE2)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h3011 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
3034 #define LLWU_PE2_REG(base) ((base)->PE2)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h3011 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
3034 #define LLWU_PE2_REG(base) ((base)->PE2)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h7350 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h4412 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h4412 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h3394 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h15724 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h3323 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h3394 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h13963 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h13922 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h15303 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h13916 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h14900 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member