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Searched refs:PDIR (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_smartcard_phy_tda8035.c478 if (((GPIO_Type *)gpio_base[context->interfaceConfig.controlPort])->PDIR & in SMARTCARD_PHY_Control()
481 if (((GPIO_Type *)gpio_base[context->interfaceConfig.irqPort])->PDIR & in SMARTCARD_PHY_Control()
499 if (((GPIO_Type *)gpio_base[context->interfaceConfig.irqPort])->PDIR & in SMARTCARD_PHY_Control()
514 if (((GPIO_Type *)gpio_base[context->interfaceConfig.irqPort])->PDIR & in SMARTCARD_PHY_Control()
Dfsl_gpio.h246 return (((uint32_t)(base->PDIR) >> pin) & 0x01UL); in GPIO_PinRead()
536 return (((base->PDIR) >> pin) & 0x01U); in FGPIO_PinRead()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h1073 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
1363 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h1953 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
1972 #define FGPIO_PDIR_REG(base) ((base)->PDIR)
2531 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
2550 #define GPIO_PDIR_REG(base) ((base)->PDIR)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h1953 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
1972 #define FGPIO_PDIR_REG(base) ((base)->PDIR)
2531 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
2550 #define GPIO_PDIR_REG(base) ((base)->PDIR)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h1953 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
1972 #define FGPIO_PDIR_REG(base) ((base)->PDIR)
2531 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
2550 #define GPIO_PDIR_REG(base) ((base)->PDIR)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h2213 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
3084 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h2142 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
3013 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h2213 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
3084 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h6112 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h3731 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h6912 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h3731 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h7716 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h7721 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h14322 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h12328 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h12611 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h13668 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h12605 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h13608 __I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */ member