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Searched refs:PCOR (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_smartcard_phy_tda8035.c237 ((GPIO_Type *)gpio_base[config->vsel0Port])->PCOR |= ((uint32_t)1u << config->vsel0Pin); in SMARTCARD_PHY_Init()
238 ((GPIO_Type *)gpio_base[config->vsel1Port])->PCOR |= ((uint32_t)1u << config->vsel1Pin); in SMARTCARD_PHY_Init()
253 ((GPIO_Type *)gpio_base[config->vsel1Port])->PCOR |= ((uint32_t)1u << config->vsel1Pin); in SMARTCARD_PHY_Init()
262 ((GPIO_Type *)gpio_base[config->vsel0Port])->PCOR |= ((uint32_t)1u << config->vsel0Pin); in SMARTCARD_PHY_Init()
271 ((GPIO_Type *)gpio_base[config->resetPort])->PCOR |= ((uint32_t)1u << config->resetPin); in SMARTCARD_PHY_Init()
326 …((GPIO_Type *)gpio_base[context->interfaceConfig.resetPort])->PCOR |= (1u << context->interfaceCon… in SMARTCARD_PHY_Activate()
335 ((GPIO_Type *)gpio_base[context->interfaceConfig.controlPort])->PCOR |= in SMARTCARD_PHY_Activate()
360 …((GPIO_Type *)gpio_base[context->interfaceConfig.resetPort])->PCOR |= (1u << context->interfaceCon… in SMARTCARD_PHY_Activate()
430 …((GPIO_Type *)gpio_base[context->interfaceConfig.resetPort])->PCOR |= (1u << context->interfaceCon… in SMARTCARD_PHY_Deactivate()
Dfsl_gpio.h167 base->PCOR = GPIO_FIT_REG(1UL << pin); in GPIO_PinWrite()
209 base->PCOR = GPIO_FIT_REG(mask); in GPIO_PortClear()
480 base->PCOR = 1UL << pin; in FGPIO_PinWrite()
507 base->PCOR = mask; in FGPIO_PortClear()
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
Dsystem_MKW22D5.c92 GPIOC->PCOR = 0x00000001u; /* Clear XCVR GPIO5 pin*/ in ExtClk_Setup_HookUp()
93 GPIOB->PCOR = 0x00080000u; /* Clear XCVR RESET pin*/ in ExtClk_Setup_HookUp()
DMKW22D5.h3729 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
Dsystem_MKW24D5.c92 GPIOC->PCOR = 0x00000001u; /* Clear XCVR GPIO5 pin*/ in ExtClk_Setup_HookUp()
93 GPIOB->PCOR = 0x00080000u; /* Clear XCVR RESET pin*/ in ExtClk_Setup_HookUp()
DMKW24D5.h3729 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h1071 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
1361 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h1951 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
1970 #define FGPIO_PCOR_REG(base) ((base)->PCOR)
2529 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
2548 #define GPIO_PCOR_REG(base) ((base)->PCOR)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h1951 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
1970 #define FGPIO_PCOR_REG(base) ((base)->PCOR)
2529 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
2548 #define GPIO_PCOR_REG(base) ((base)->PCOR)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h1951 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
1970 #define FGPIO_PCOR_REG(base) ((base)->PCOR)
2529 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
2548 #define GPIO_PCOR_REG(base) ((base)->PCOR)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h2211 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
3082 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h2140 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
3011 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h2211 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
3082 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h6110 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h6910 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h7714 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h7719 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h14320 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h12326 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h12609 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h13666 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h12603 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h13606 __O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */ member