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Searched refs:MTBDWT_TBCTRL_ACOMP0_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h2605 #define MTBDWT_TBCTRL_ACOMP0_MASK (0x1U) macro
2607 … (((uint32_t)(((uint32_t)(x)) << MTBDWT_TBCTRL_ACOMP0_SHIFT)) & MTBDWT_TBCTRL_ACOMP0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h4882 #define MTBDWT_TBCTRL_ACOMP0_MASK (0x1U) macro
4884 … (((uint32_t)(((uint32_t)(x)) << MTBDWT_TBCTRL_ACOMP0_SHIFT)) & MTBDWT_TBCTRL_ACOMP0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h5095 #define MTBDWT_TBCTRL_ACOMP0_MASK 0x1u macro
5098 … (((uint32_t)(((uint32_t)(x))<<MTBDWT_TBCTRL_ACOMP0_SHIFT))&MTBDWT_TBCTRL_ACOMP0_MASK)
DMKW40Z4_extension.h15705 #define MTBDWT_RD_TBCTRL_ACOMP0(base) ((MTBDWT_TBCTRL_REG(base) & MTBDWT_TBCTRL_ACOMP0_MASK) >> MTB…
15709 #define MTBDWT_WR_TBCTRL_ACOMP0(base, value) (MTBDWT_RMW_TBCTRL(base, MTBDWT_TBCTRL_ACOMP0_MASK, MT…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h4811 #define MTBDWT_TBCTRL_ACOMP0_MASK (0x1U) macro
4813 … (((uint32_t)(((uint32_t)(x)) << MTBDWT_TBCTRL_ACOMP0_SHIFT)) & MTBDWT_TBCTRL_ACOMP0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h4882 #define MTBDWT_TBCTRL_ACOMP0_MASK (0x1U) macro
4884 … (((uint32_t)(((uint32_t)(x)) << MTBDWT_TBCTRL_ACOMP0_SHIFT)) & MTBDWT_TBCTRL_ACOMP0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h5095 #define MTBDWT_TBCTRL_ACOMP0_MASK 0x1u macro
5098 … (((uint32_t)(((uint32_t)(x))<<MTBDWT_TBCTRL_ACOMP0_SHIFT))&MTBDWT_TBCTRL_ACOMP0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h5095 #define MTBDWT_TBCTRL_ACOMP0_MASK 0x1u macro
5098 … (((uint32_t)(((uint32_t)(x))<<MTBDWT_TBCTRL_ACOMP0_SHIFT))&MTBDWT_TBCTRL_ACOMP0_MASK)