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Searched refs:MTBDWT_CTRL_NUMCMP_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h2564 #define MTBDWT_CTRL_NUMCMP_MASK (0xF0000000U) macro
2566 … (((uint32_t)(((uint32_t)(x)) << MTBDWT_CTRL_NUMCMP_SHIFT)) & MTBDWT_CTRL_NUMCMP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h4841 #define MTBDWT_CTRL_NUMCMP_MASK (0xF0000000U) macro
4843 … (((uint32_t)(((uint32_t)(x)) << MTBDWT_CTRL_NUMCMP_SHIFT)) & MTBDWT_CTRL_NUMCMP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h5059 #define MTBDWT_CTRL_NUMCMP_MASK 0xF0000000u macro
5062 … (((uint32_t)(((uint32_t)(x))<<MTBDWT_CTRL_NUMCMP_SHIFT))&MTBDWT_CTRL_NUMCMP_MASK)
DMKW40Z4_extension.h15442 #define MTBDWT_RD_CTRL_NUMCMP(base) ((MTBDWT_CTRL_REG(base) & MTBDWT_CTRL_NUMCMP_MASK) >> MTBDWT_CT…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h4770 #define MTBDWT_CTRL_NUMCMP_MASK (0xF0000000U) macro
4772 … (((uint32_t)(((uint32_t)(x)) << MTBDWT_CTRL_NUMCMP_SHIFT)) & MTBDWT_CTRL_NUMCMP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h4841 #define MTBDWT_CTRL_NUMCMP_MASK (0xF0000000U) macro
4843 … (((uint32_t)(((uint32_t)(x)) << MTBDWT_CTRL_NUMCMP_SHIFT)) & MTBDWT_CTRL_NUMCMP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h5059 #define MTBDWT_CTRL_NUMCMP_MASK 0xF0000000u macro
5062 … (((uint32_t)(((uint32_t)(x))<<MTBDWT_CTRL_NUMCMP_SHIFT))&MTBDWT_CTRL_NUMCMP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h5059 #define MTBDWT_CTRL_NUMCMP_MASK 0xF0000000u macro
5062 … (((uint32_t)(((uint32_t)(x))<<MTBDWT_CTRL_NUMCMP_SHIFT))&MTBDWT_CTRL_NUMCMP_MASK)