Home
last modified time | relevance | path

Searched refs:MCM_PLACR_DFCS_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_ftfx_cache.c39 #if defined(MCM_PLACR_DFCS_MASK)
225 MCM0_CACHE_REG |= MCM_PLACR_DFCS_MASK; in FTFx_CACHE_PflashSetPrefetchSpeculation()
230 MCM0_CACHE_REG &= ~MCM_PLACR_DFCS_MASK; in FTFx_CACHE_PflashSetPrefetchSpeculation()
305 if (0U != (value & MCM_PLACR_DFCS_MASK)) in FTFx_CACHE_PflashGetPrefetchSpeculation()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h2259 #define MCM_PLACR_DFCS_MASK (0x8000U) macro
2261 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_DFCS_SHIFT)) & MCM_PLACR_DFCS_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h4536 #define MCM_PLACR_DFCS_MASK (0x8000U) macro
4538 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_DFCS_SHIFT)) & MCM_PLACR_DFCS_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h4654 #define MCM_PLACR_DFCS_MASK 0x8000u macro
4657 …x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCS_SHIFT))&MCM_PLACR_DFCS_MASK)
DMKW40Z4_extension.h14577 #define MCM_RD_PLACR_DFCS(base) ((MCM_PLACR_REG(base) & MCM_PLACR_DFCS_MASK) >> MCM_PLACR_DFCS_SHIF…
14581 #define MCM_WR_PLACR_DFCS(base, value) (MCM_RMW_PLACR(base, MCM_PLACR_DFCS_MASK, MCM_PLACR_DFCS(val…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h4465 #define MCM_PLACR_DFCS_MASK (0x8000U) macro
4467 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_DFCS_SHIFT)) & MCM_PLACR_DFCS_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h4536 #define MCM_PLACR_DFCS_MASK (0x8000U) macro
4538 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_DFCS_SHIFT)) & MCM_PLACR_DFCS_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h4654 #define MCM_PLACR_DFCS_MASK 0x8000u macro
4657 …x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCS_SHIFT))&MCM_PLACR_DFCS_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h4654 #define MCM_PLACR_DFCS_MASK 0x8000u macro
4657 …x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCS_SHIFT))&MCM_PLACR_DFCS_MASK)