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Searched refs:MCM_PLACR_DFCIC_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h2250 #define MCM_PLACR_DFCIC_MASK (0x1000U) macro
2252 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_DFCIC_SHIFT)) & MCM_PLACR_DFCIC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h4527 #define MCM_PLACR_DFCIC_MASK (0x1000U) macro
4529 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_DFCIC_SHIFT)) & MCM_PLACR_DFCIC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h4642 #define MCM_PLACR_DFCIC_MASK 0x1000u macro
4645 …) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCIC_SHIFT))&MCM_PLACR_DFCIC_MASK)
DMKW40Z4_extension.h14520 #define MCM_RD_PLACR_DFCIC(base) ((MCM_PLACR_REG(base) & MCM_PLACR_DFCIC_MASK) >> MCM_PLACR_DFCIC_S…
14524 #define MCM_WR_PLACR_DFCIC(base, value) (MCM_RMW_PLACR(base, MCM_PLACR_DFCIC_MASK, MCM_PLACR_DFCIC(…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h4456 #define MCM_PLACR_DFCIC_MASK (0x1000U) macro
4458 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_DFCIC_SHIFT)) & MCM_PLACR_DFCIC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h4527 #define MCM_PLACR_DFCIC_MASK (0x1000U) macro
4529 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_DFCIC_SHIFT)) & MCM_PLACR_DFCIC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h4642 #define MCM_PLACR_DFCIC_MASK 0x1000u macro
4645 …) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCIC_SHIFT))&MCM_PLACR_DFCIC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h4642 #define MCM_PLACR_DFCIC_MASK 0x1000u macro
4645 …) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCIC_SHIFT))&MCM_PLACR_DFCIC_MASK)