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Searched refs:MCG_S_IRCST_MASK (Results 1 – 25 of 28) sorted by relevance

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/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
Dfsl_clock.c95 #define MCG_S_IRCST_VAL ((MCG->S & MCG_S_IRCST_MASK) >> MCG_S_IRCST_SHIFT)
1344 if (!(MCG->S & MCG_S_IRCST_MASK)) in CLOCK_SetMcgConfig()
DMKW41Z4.h4397 #define MCG_S_IRCST_MASK (0x1U) macro
4399 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
Dfsl_clock.c67 #define MCG_S_IRCST_VAL ((MCG->S & MCG_S_IRCST_MASK) >> MCG_S_IRCST_SHIFT)
1690 if (!(MCG->S & MCG_S_IRCST_MASK)) in CLOCK_SetMcgConfig()
DMKW22D5.h4859 #define MCG_S_IRCST_MASK (0x1U) macro
4861 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
Dfsl_clock.c67 #define MCG_S_IRCST_VAL ((MCG->S & MCG_S_IRCST_MASK) >> MCG_S_IRCST_SHIFT)
1690 if (!(MCG->S & MCG_S_IRCST_MASK)) in CLOCK_SetMcgConfig()
DMKW24D5.h4859 #define MCG_S_IRCST_MASK (0x1U) macro
4861 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
Dfsl_clock.c67 #define MCG_S_IRCST_VAL ((MCG->S & MCG_S_IRCST_MASK) >> MCG_S_IRCST_SHIFT)
DMKL25Z4.h2104 #define MCG_S_IRCST_MASK (0x1U) macro
2106 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
Dfsl_clock.c49 #define MCG_S_IRCST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_IRCST_MASK) >> (uint32_t)MCG_S_IRCST_S…
DMKV58F24.h16506 #define MCG_S_IRCST_MASK (0x1U) macro
16512 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
Dfsl_clock.c49 #define MCG_S_IRCST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_IRCST_MASK) >> (uint32_t)MCG_S_IRCST_S…
DMKV56F24.h15166 #define MCG_S_IRCST_MASK (0x1U) macro
15172 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
Dfsl_clock.c49 #define MCG_S_IRCST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_IRCST_MASK) >> (uint32_t)MCG_S_IRCST_S…
DMK22F51212.h8894 #define MCG_S_IRCST_MASK (0x1U) macro
8900 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
Dfsl_clock.c49 #define MCG_S_IRCST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_IRCST_MASK) >> (uint32_t)MCG_S_IRCST_S…
DMK64F12.h16790 #define MCG_S_IRCST_MASK (0x1U) macro
16796 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
Dfsl_clock.c49 #define MCG_S_IRCST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_IRCST_MASK) >> (uint32_t)MCG_S_IRCST_S…
DMK80F25615.h16568 #define MCG_S_IRCST_MASK (0x1U) macro
16574 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
Dfsl_clock.c49 #define MCG_S_IRCST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_IRCST_MASK) >> (uint32_t)MCG_S_IRCST_S…
/hal_nxp-2.7.6/mcux/devices/MK66F18/
Dfsl_clock.c49 #define MCG_S_IRCST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_IRCST_MASK) >> (uint32_t)MCG_S_IRCST_S…
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h4397 #define MCG_S_IRCST_MASK (0x1U) macro
4399 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h4447 #define MCG_S_IRCST_MASK 0x1u macro
4450 …RCST(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_IRCST_SHIFT))&MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h4326 #define MCG_S_IRCST_MASK (0x1U) macro
4328 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_IRCST_SHIFT)) & MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h4447 #define MCG_S_IRCST_MASK 0x1u macro
4450 …RCST(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_IRCST_SHIFT))&MCG_S_IRCST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h4447 #define MCG_S_IRCST_MASK 0x1u macro
4450 …RCST(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_IRCST_SHIFT))&MCG_S_IRCST_MASK)

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