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Searched refs:MCG_SC_LOCS0_MASK (Results 1 – 25 of 28) sorted by relevance

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/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
Dfsl_clock.c643 …MCG->SC = (MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV… in CLOCK_SetInternalRefClkConfig()
834 if (MCG->SC & MCG_SC_LOCS0_MASK) in CLOCK_GetStatusFlags()
934 mcg_sc &= ~(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
DMKL25Z4.h2127 #define MCG_SC_LOCS0_MASK (0x1U) macro
2129 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
Dfsl_clock.c696 …MCG->SC = (MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV… in CLOCK_SetInternalRefClkConfig()
906 if (MCG->SC & MCG_SC_LOCS0_MASK) in CLOCK_GetStatusFlags()
1017 mcg_sc &= ~(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
DMKW22D5.h4882 #define MCG_SC_LOCS0_MASK (0x1U) macro
4884 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
Dfsl_clock.c696 …MCG->SC = (MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV… in CLOCK_SetInternalRefClkConfig()
906 if (MCG->SC & MCG_SC_LOCS0_MASK) in CLOCK_GetStatusFlags()
1017 mcg_sc &= ~(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
DMKW24D5.h4882 #define MCG_SC_LOCS0_MASK (0x1U) macro
4884 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
Dfsl_clock.c797 …(uint8_t)(MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV(… in CLOCK_SetInternalRefClkConfig()
1059 if ((MCG->SC & MCG_SC_LOCS0_MASK) != 0U) in CLOCK_GetStatusFlags()
1225 mcg_sc &= ~(uint8_t)(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
Dfsl_clock.c797 …(uint8_t)(MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV(… in CLOCK_SetInternalRefClkConfig()
1059 if ((MCG->SC & MCG_SC_LOCS0_MASK) != 0U) in CLOCK_GetStatusFlags()
1225 mcg_sc &= ~(uint8_t)(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
DMKV56F24.h15217 #define MCG_SC_LOCS0_MASK (0x1U) macro
15223 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
Dfsl_clock.c904 …(uint8_t)(MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV(… in CLOCK_SetInternalRefClkConfig()
1190 if ((MCG->SC & MCG_SC_LOCS0_MASK) != 0U) in CLOCK_GetStatusFlags()
1367 mcg_sc &= ~(uint8_t)(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
DMK22F51212.h8945 #define MCG_SC_LOCS0_MASK (0x1U) macro
8951 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
Dfsl_clock.c871 …(uint8_t)(MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV(… in CLOCK_SetInternalRefClkConfig()
1157 if ((MCG->SC & MCG_SC_LOCS0_MASK) != 0U) in CLOCK_GetStatusFlags()
1334 mcg_sc &= ~(uint8_t)(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
DMK64F12.h16850 #define MCG_SC_LOCS0_MASK (0x1U) macro
16856 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
Dfsl_clock.c911 …(uint8_t)(MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV(… in CLOCK_SetInternalRefClkConfig()
1199 if ((MCG->SC & MCG_SC_LOCS0_MASK) != 0U) in CLOCK_GetStatusFlags()
1376 mcg_sc &= ~(uint8_t)(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
DMK80F25615.h16619 #define MCG_SC_LOCS0_MASK (0x1U) macro
16625 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
Dfsl_clock.c911 …(uint8_t)(MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV(… in CLOCK_SetInternalRefClkConfig()
1199 if ((MCG->SC & MCG_SC_LOCS0_MASK) != 0U) in CLOCK_GetStatusFlags()
1376 mcg_sc &= ~(uint8_t)(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
Dfsl_clock.c625 …MCG->SC = (MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV… in CLOCK_SetInternalRefClkConfig()
777 mcg_sc &= ~(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
DMKW41Z4.h4411 #define MCG_SC_LOCS0_MASK (0x1U) macro
4413 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
Dfsl_clock.c1129 …(uint8_t)(MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV(… in CLOCK_SetInternalRefClkConfig()
1458 if ((MCG->SC & MCG_SC_LOCS0_MASK) != 0U) in CLOCK_GetStatusFlags()
1644 mcg_sc &= ~(uint8_t)(MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK); in CLOCK_TrimInternalRefClk()
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4_extension.h14028 #define MCG_RD_SC_LOCS0(base) ((MCG_SC_REG(base) & MCG_SC_LOCS0_MASK) >> MCG_SC_LOCS0_SHIFT)
14032 #define MCG_WR_SC_LOCS0(base, value) (MCG_RMW_SC(base, (MCG_SC_LOCS0_MASK | MCG_SC_ATMF_MASK), MCG_…
14059 #define MCG_WR_SC_FCRDIV(base, value) (MCG_RMW_SC(base, (MCG_SC_FCRDIV_MASK | MCG_SC_LOCS0_MASK | M…
14084 #define MCG_WR_SC_FLTPRSRV(base, value) (MCG_RMW_SC(base, (MCG_SC_FLTPRSRV_MASK | MCG_SC_LOCS0_MASK…
14106 #define MCG_WR_SC_ATMF(base, value) (MCG_RMW_SC(base, (MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK), MCG_S…
14125 #define MCG_WR_SC_ATMS(base, value) (MCG_RMW_SC(base, (MCG_SC_ATMS_MASK | MCG_SC_LOCS0_MASK | MCG_S…
14148 #define MCG_WR_SC_ATME(base, value) (MCG_RMW_SC(base, (MCG_SC_ATME_MASK | MCG_SC_LOCS0_MASK | MCG_S…
DMKW40Z4.h4464 #define MCG_SC_LOCS0_MASK 0x1u macro
4467 …CS0(x) (((uint8_t)(((uint8_t)(x))<<MCG_SC_LOCS0_SHIFT))&MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h4411 #define MCG_SC_LOCS0_MASK (0x1U) macro
4413 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h4340 #define MCG_SC_LOCS0_MASK (0x1U) macro
4342 …x) (((uint8_t)(((uint8_t)(x)) << MCG_SC_LOCS0_SHIFT)) & MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h4464 #define MCG_SC_LOCS0_MASK 0x1u macro
4467 …CS0(x) (((uint8_t)(((uint8_t)(x))<<MCG_SC_LOCS0_SHIFT))&MCG_SC_LOCS0_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h4464 #define MCG_SC_LOCS0_MASK 0x1u macro
4467 …CS0(x) (((uint8_t)(((uint8_t)(x))<<MCG_SC_LOCS0_SHIFT))&MCG_SC_LOCS0_MASK)

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