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Searched refs:MCG_C6_VDIV0 (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
Dfsl_clock.c767 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
DMKL25Z4.h2092 #define MCG_C6_VDIV0(x) (((uint8_t)(((uint8_t)(x)) << MCG_C6_VDIV0_SHIFT))… macro
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
Dfsl_clock.c820 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
DMKW22D5.h4847 #define MCG_C6_VDIV0(x) (((uint8_t)(((uint8_t)(x)) << MCG_C6_VDIV0_SHIFT))… macro
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
Dfsl_clock.c820 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
DMKW24D5.h4847 #define MCG_C6_VDIV0(x) (((uint8_t)(((uint8_t)(x)) << MCG_C6_VDIV0_SHIFT))… macro
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
Dfsl_clock.c952 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
DMKV58F24.h16671 #define MCG_C6_VDIV0(x) (MCG_C6_VDIV(x)) macro
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
Dfsl_clock.c952 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
DMKV56F24.h15331 #define MCG_C6_VDIV0(x) (MCG_C6_VDIV(x)) macro
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
Dfsl_clock.c1057 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
DMK22F51212.h8868 #define MCG_C6_VDIV0(x) (((uint8_t)(((uint8_t)(x)) << MCG_C6_VDIV0_SHIFT))… macro
/hal_nxp-2.7.6/mcux/devices/MK64F12/
Dfsl_clock.c1024 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
DMK64F12.h16759 #define MCG_C6_VDIV0(x) (((uint8_t)(((uint8_t)(x)) << MCG_C6_VDIV0_SHIFT))… macro
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
Dfsl_clock.c1066 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
DMK80F25615.h16767 #define MCG_C6_VDIV0(x) (MCG_C6_VDIV(x)) macro
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
Dfsl_clock.c1066 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
DMK82F25615.h17514 #define MCG_C6_VDIV0(x) (MCG_C6_VDIV(x)) macro
/hal_nxp-2.7.6/mcux/devices/MK66F18/
Dfsl_clock.c1284 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
DMK66F18.h17348 #define MCG_C6_VDIV0(x) (MCG_C6_VDIV(x)) macro