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Searched refs:LPTMR_PSR_PBYP_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h1944 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
1946 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h7939 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
7945 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h4699 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
4701 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h9347 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
9353 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h4699 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
4701 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h10151 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
10157 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h10156 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
10162 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h3672 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
3674 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h16397 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
16403 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h3417 #define LPTMR_PSR_PBYP_MASK 0x4u macro
3420 …x) (((uint32_t)(((uint32_t)(x))<<LPTMR_PSR_PBYP_SHIFT))&LPTMR_PSR_PBYP_MASK)
DMKW40Z4_extension.h10109 #define LPTMR_RD_PSR_PBYP(base) ((LPTMR_PSR_REG(base) & LPTMR_PSR_PBYP_MASK) >> LPTMR_PSR_PBYP_SHIF…
10113 #define LPTMR_WR_PSR_PBYP(base, value) (LPTMR_RMW_PSR(base, LPTMR_PSR_PBYP_MASK, LPTMR_PSR_PBYP(val…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h3601 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
3603 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h3672 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
3674 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h3417 #define LPTMR_PSR_PBYP_MASK 0x4u macro
3420 …x) (((uint32_t)(((uint32_t)(x))<<LPTMR_PSR_PBYP_SHIFT))&LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h3417 #define LPTMR_PSR_PBYP_MASK 0x4u macro
3420 …x) (((uint32_t)(((uint32_t)(x))<<LPTMR_PSR_PBYP_SHIFT))&LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h14838 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
14844 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h15479 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
15485 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h16178 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
16184 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h15473 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
15479 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h16168 #define LPTMR_PSR_PBYP_MASK (0x4U) macro
16174 … (((uint32_t)(((uint32_t)(x)) << LPTMR_PSR_PBYP_SHIFT)) & LPTMR_PSR_PBYP_MASK)