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Searched refs:LLWU_FILT1_FILTSEL_MASK (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_llwu.c329 *regBase = (uint8_t)((*regBase & ~(LLWU_FILT1_FILTSEL_MASK | LLWU_FILT1_FILTE_MASK)) | in LLWU_SetPinFilterMode()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h1847 #define LLWU_FILT1_FILTSEL_MASK (0xFU) macro
1849 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h7772 #define LLWU_FILT1_FILTSEL_MASK (0xFU) macro
7778 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h4594 #define LLWU_FILT1_FILTSEL_MASK (0xFU) macro
4596 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h4594 #define LLWU_FILT1_FILTSEL_MASK (0xFU) macro
4596 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h3575 #define LLWU_FILT1_FILTSEL_MASK (0xFU) macro
3577 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h16196 #define LLWU_FILT1_FILTSEL_MASK (0xFU) macro
16202 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h3259 #define LLWU_FILT1_FILTSEL_MASK 0xFu macro
3262 … (((uint8_t)(((uint8_t)(x))<<LLWU_FILT1_FILTSEL_SHIFT))&LLWU_FILT1_FILTSEL_MASK)
DMKW40Z4_extension.h9715 #define LLWU_RD_FILT1_FILTSEL(base) ((LLWU_FILT1_REG(base) & LLWU_FILT1_FILTSEL_MASK) >> LLWU_FILT1…
9719 #define LLWU_WR_FILT1_FILTSEL(base, value) (LLWU_RMW_FILT1(base, (LLWU_FILT1_FILTSEL_MASK | LLWU_FI…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h3504 #define LLWU_FILT1_FILTSEL_MASK (0xFU) macro
3506 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h3575 #define LLWU_FILT1_FILTSEL_MASK (0xFU) macro
3577 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h3259 #define LLWU_FILT1_FILTSEL_MASK 0xFu macro
3262 … (((uint8_t)(((uint8_t)(x))<<LLWU_FILT1_FILTSEL_SHIFT))&LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h3259 #define LLWU_FILT1_FILTSEL_MASK 0xFu macro
3262 … (((uint8_t)(((uint8_t)(x))<<LLWU_FILT1_FILTSEL_SHIFT))&LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h14671 #define LLWU_FILT1_FILTSEL_MASK (0x1FU) macro
14677 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h14632 #define LLWU_FILT1_FILTSEL_MASK (0x1FU) macro
14638 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h16011 #define LLWU_FILT1_FILTSEL_MASK (0x1FU) macro
16017 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h14626 #define LLWU_FILT1_FILTSEL_MASK (0x1FU) macro
14632 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h15610 #define LLWU_FILT1_FILTSEL_MASK (0x1FU) macro
15616 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTSEL_SHIFT)) & LLWU_FILT1_FILTSEL_MASK)