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Searched refs:LLWU_FILT1_FILTF_MASK (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_llwu.c331 LLWU_FILT1_FILTF_MASK) /* W1C to clear the FILTF flag bit. */ in LLWU_SetPinFilterMode()
356 status = ((base->FILT1 & LLWU_FILT1_FILTF_MASK) != 0U); in LLWU_GetPinFilterFlag()
445 reg |= LLWU_FILT1_FILTF_MASK; in LLWU_ClearPinFilterFlag()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h1853 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
1855 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h7788 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
7794 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h4600 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
4602 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h4600 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
4602 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h3581 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
3583 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h16214 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
16220 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h3267 #define LLWU_FILT1_FILTF_MASK 0x80u macro
3270 …x) (((uint8_t)(((uint8_t)(x))<<LLWU_FILT1_FILTF_SHIFT))&LLWU_FILT1_FILTF_MASK)
DMKW40Z4_extension.h9719 …SEL(base, value) (LLWU_RMW_FILT1(base, (LLWU_FILT1_FILTSEL_MASK | LLWU_FILT1_FILTF_MASK), LLWU_FIL…
9740 …FILTE(base, value) (LLWU_RMW_FILT1(base, (LLWU_FILT1_FILTE_MASK | LLWU_FILT1_FILTF_MASK), LLWU_FIL…
9757 #define LLWU_RD_FILT1_FILTF(base) ((LLWU_FILT1_REG(base) & LLWU_FILT1_FILTF_MASK) >> LLWU_FILT1_FIL…
9761 #define LLWU_WR_FILT1_FILTF(base, value) (LLWU_RMW_FILT1(base, LLWU_FILT1_FILTF_MASK, LLWU_FILT1_FI…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h3510 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
3512 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h3581 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
3583 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h3267 #define LLWU_FILT1_FILTF_MASK 0x80u macro
3270 …x) (((uint8_t)(((uint8_t)(x))<<LLWU_FILT1_FILTF_SHIFT))&LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h3267 #define LLWU_FILT1_FILTF_MASK 0x80u macro
3270 …x) (((uint8_t)(((uint8_t)(x))<<LLWU_FILT1_FILTF_SHIFT))&LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h14687 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
14693 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h14648 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
14654 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h16027 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
16033 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h14642 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
14648 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h15626 #define LLWU_FILT1_FILTF_MASK (0x80U) macro
15632 … (((uint8_t)(((uint8_t)(x)) << LLWU_FILT1_FILTF_SHIFT)) & LLWU_FILT1_FILTF_MASK)