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Searched refs:IOMUXC_GPR_SAIMCLK_LOWBITMASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
Dfsl_iomuxc.h359 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
501 gpr = base->GPR1 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_LOWBITMASK << (uint32_t)mclk); in IOMUXC_SetSaiMClkClockSource()
502 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
Dfsl_iomuxc.h389 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
528 gpr = base->GPR1 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_LOWBITMASK << (uint32_t)mclk); in IOMUXC_SetSaiMClkClockSource()
529 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
Dfsl_iomuxc.h747 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
891 gpr = base->GPR1 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_LOWBITMASK << (uint32_t)mclk); in IOMUXC_SetSaiMClkClockSource()
892 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
Dfsl_iomuxc.h801 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
945 gpr = base->GPR1 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_LOWBITMASK << (uint32_t)mclk); in IOMUXC_SetSaiMClkClockSource()
946 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
Dfsl_iomuxc.h1033 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
1179 gpr = base->GPR1 & ~(IOMUXC_GPR_SAIMCLK_LOWBITMASK << mclk); in IOMUXC_SetSaiMClkClockSource()
1180 base->GPR1 = ((clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
Dfsl_iomuxc.h1033 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
1179 gpr = base->GPR1 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_LOWBITMASK << (uint32_t)mclk); in IOMUXC_SetSaiMClkClockSource()
1180 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
Dfsl_iomuxc.h1208 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
1356 gpr = base->GPR1 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_LOWBITMASK << (uint32_t)mclk); in IOMUXC_SetSaiMClkClockSource()
1357 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
Dfsl_iomuxc.h1192 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
1340 gpr = base->GPR1 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_LOWBITMASK << (uint32_t)mclk); in IOMUXC_SetSaiMClkClockSource()
1341 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
Dfsl_iomuxc.h1208 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
1356 gpr = base->GPR1 & ~(IOMUXC_GPR_SAIMCLK_LOWBITMASK << mclk); in IOMUXC_SetSaiMClkClockSource()
1357 base->GPR1 = ((clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
Dfsl_iomuxc.h1587 #define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U) macro
1706 gpr = base->GPR0 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_LOWBITMASK << (uint32_t)mclk); in IOMUXC_SetSaiMClkClockSource()
1707 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()