Searched refs:IOMUXC_GPIO_EMC_24_LPUART5_RX (Results 1 – 5 of 5) sorted by relevance
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/ |
D | fsl_iomuxc.h | 228 #define IOMUXC_GPIO_EMC_24_LPUART5_RX 0x401F8074U, 0x2U, 0x401F8548U, 0x0U, 0x401F8264U macro
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/ |
D | fsl_iomuxc.h | 228 #define IOMUXC_GPIO_EMC_24_LPUART5_RX 0x401F8074U, 0x2U, 0x401F8548U, 0x0U, 0x401F8264U macro
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/ |
D | fsl_iomuxc.h | 238 #define IOMUXC_GPIO_EMC_24_LPUART5_RX 0x401F8074U, 0x2U, 0x401F8548U, 0x0U, 0x401F8264U macro
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/ |
D | fsl_iomuxc.h | 228 #define IOMUXC_GPIO_EMC_24_LPUART5_RX 0x401F8074U, 0x2U, 0x401F8548U, 0x0U, 0x401F8264U macro
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/ |
D | fsl_iomuxc.h | 238 #define IOMUXC_GPIO_EMC_24_LPUART5_RX 0x401F8074U, 0x2U, 0x401F8548U, 0x0U, 0x401F8264U macro
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