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Searched refs:IOMUXC_GPIO_EMC_15_QTIMER3_TIMER0 (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
Dfsl_iomuxc.h165 #define IOMUXC_GPIO_EMC_15_QTIMER3_TIMER0 0x401F8050U, 0x4U, 0x401F857CU, 0x0U, 0x401F8240U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
Dfsl_iomuxc.h165 #define IOMUXC_GPIO_EMC_15_QTIMER3_TIMER0 0x401F8050U, 0x4U, 0x401F857CU, 0x0U, 0x401F8240U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
Dfsl_iomuxc.h171 #define IOMUXC_GPIO_EMC_15_QTIMER3_TIMER0 0x401F8050U, 0x4U, 0x401F857CU, 0x0U, 0x401F8240U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
Dfsl_iomuxc.h165 #define IOMUXC_GPIO_EMC_15_QTIMER3_TIMER0 0x401F8050U, 0x4U, 0x401F857CU, 0x0U, 0x401F8240U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
Dfsl_iomuxc.h171 #define IOMUXC_GPIO_EMC_15_QTIMER3_TIMER0 0x401F8050U, 0x4U, 0x401F857CU, 0x0U, 0x401F8240U macro