Searched refs:IOMUXC_GPIO_B0_07_QTIMER3_TIMER1 (Results 1 – 5 of 5) sorted by relevance
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/ |
D | fsl_iomuxc.h | 703 #define IOMUXC_GPIO_B0_07_QTIMER3_TIMER1 0x401F8158U, 0x1U, 0x401F8580U, 0x2U, 0x401F8348U macro
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/ |
D | fsl_iomuxc.h | 703 #define IOMUXC_GPIO_B0_07_QTIMER3_TIMER1 0x401F8158U, 0x1U, 0x401F8580U, 0x2U, 0x401F8348U macro
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/ |
D | fsl_iomuxc.h | 778 #define IOMUXC_GPIO_B0_07_QTIMER3_TIMER1 0x401F8158U, 0x1U, 0x401F8580U, 0x2U, 0x401F8348U macro
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/ |
D | fsl_iomuxc.h | 762 #define IOMUXC_GPIO_B0_07_QTIMER3_TIMER1 0x401F8158U, 0x1U, 0x401F8580U, 0x2U, 0x401F8348U macro
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/ |
D | fsl_iomuxc.h | 778 #define IOMUXC_GPIO_B0_07_QTIMER3_TIMER1 0x401F8158U, 0x1U, 0x401F8580U, 0x2U, 0x401F8348U macro
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