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Searched refs:IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
Dfsl_iomuxc.h514 #define IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 0x401F8100U, 0x5U, 0, 0, 0x401F8274U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
Dfsl_iomuxc.h516 #define IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 0x401F8100U, 0x5U, 0, 0, 0x401F82F0U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
Dfsl_iomuxc.h516 #define IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 0x401F8100U, 0x5U, 0, 0, 0x401F82F0U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
Dfsl_iomuxc.h556 #define IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 0x401F8100U, 0x5U, 0, 0, 0x401F82F0U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
Dfsl_iomuxc.h540 #define IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 0x401F8100U, 0x5U, 0, 0, 0x401F82F0U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
Dfsl_iomuxc.h556 #define IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 0x401F8100U, 0x5U, 0, 0, 0x401F82F0U macro