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Searched refs:IOMUXC_GPIO_AD_B0_15_XBAR1_IN25 (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
Dfsl_iomuxc.h494 #define IOMUXC_GPIO_AD_B0_15_XBAR1_IN25 0x401F80F8U, 0x1U, 0x401F8650U, 0x0U, 0x401F82E8U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
Dfsl_iomuxc.h494 #define IOMUXC_GPIO_AD_B0_15_XBAR1_IN25 0x401F80F8U, 0x1U, 0x401F8650U, 0x0U, 0x401F82E8U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
Dfsl_iomuxc.h531 #define IOMUXC_GPIO_AD_B0_15_XBAR1_IN25 0x401F80F8U, 0x1U, 0x401F8650U, 0x0U, 0x401F82E8U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
Dfsl_iomuxc.h515 #define IOMUXC_GPIO_AD_B0_15_XBAR1_IN25 0x401F80F8U, 0x1U, 0x401F8650U, 0x0U, 0x401F82E8U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
Dfsl_iomuxc.h531 #define IOMUXC_GPIO_AD_B0_15_XBAR1_IN25 0x401F80F8U, 0x1U, 0x401F8650U, 0x0U, 0x401F82E8U macro