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Searched refs:IOMUXC_GPIO_AD_B0_05_MQS_LEFT (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
Dfsl_iomuxc.h405 #define IOMUXC_GPIO_AD_B0_05_MQS_LEFT 0x401F80D0U, 0x1U, 0, 0, 0x401F82C0U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
Dfsl_iomuxc.h405 #define IOMUXC_GPIO_AD_B0_05_MQS_LEFT 0x401F80D0U, 0x1U, 0, 0, 0x401F82C0U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
Dfsl_iomuxc.h436 #define IOMUXC_GPIO_AD_B0_05_MQS_LEFT 0x401F80D0U, 0x1U, 0, 0, 0x401F82C0U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
Dfsl_iomuxc.h420 #define IOMUXC_GPIO_AD_B0_05_MQS_LEFT 0x401F80D0U, 0x1U, 0, 0, 0x401F82C0U macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
Dfsl_iomuxc.h436 #define IOMUXC_GPIO_AD_B0_05_MQS_LEFT 0x401F80D0U, 0x1U, 0, 0, 0x401F82C0U macro