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Searched refs:GPCLR (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_port.h308 base->GPCLR = ((mask & 0xffffU) << 16) | pcrl; in PORT_SetMultiplePinsConfig()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3123 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h5739 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
5758 #define PORT_GPCLR_REG(base) ((base)->GPCLR)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h5739 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
5758 #define PORT_GPCLR_REG(base) ((base)->GPCLR)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h5739 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
5758 #define PORT_GPCLR_REG(base) ((base)->GPCLR)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h10172 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h5644 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h11901 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h5644 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h12706 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h12712 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h5336 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h18340 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h5265 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h5336 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h16810 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h18021 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h18150 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h18994 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h18645 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member