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Searched refs:FTFA_FSTAT_CCIF_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-2.7.6/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW40Z4/
Difr_mkw40z4_radio.c137 while((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT)==0); /* Wait till CCIF=1 */ in read_resource_ifr()
154 FTFA->FSTAT = FTFA_FSTAT_CCIF_MASK; in read_resource_ifr()
155 while((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT)==0); /* Wait till CCIF=1 */ in read_resource_ifr()
/hal_nxp-2.7.6/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/
Difr_radio.c249 while ((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT) == 0); /* Wait till CCIF=1 */ in read_resource_ifr()
263 FTFA->FSTAT = FTFA_FSTAT_CCIF_MASK; in read_resource_ifr()
264 while ((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT) == 0); /* Wait till CCIF=1 */ in read_resource_ifr()
/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_ftfx_adapter.h32 #define FTFx_FSTAT_CCIF_MASK FTFA_FSTAT_CCIF_MASK
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h1208 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
1210 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h4255 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
4261 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h2360 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2362 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4_extension.h5745 …FPVIOL_MASK | FTFA_FSTAT_ACCERR_MASK | FTFA_FSTAT_RDCOLERR_MASK | FTFA_FSTAT_CCIF_MASK), FTFA_FSTA…
5768 …ACCERR_MASK | FTFA_FSTAT_FPVIOL_MASK | FTFA_FSTAT_RDCOLERR_MASK | FTFA_FSTAT_CCIF_MASK), FTFA_FSTA…
5791 …RDCOLERR_MASK | FTFA_FSTAT_FPVIOL_MASK | FTFA_FSTAT_ACCERR_MASK | FTFA_FSTAT_CCIF_MASK), FTFA_FSTA…
5811 #define FTFA_RD_FSTAT_CCIF(base) ((FTFA_FSTAT_REG(base) & FTFA_FSTAT_CCIF_MASK) >> FTFA_FSTAT_CCIF_…
5815 #define FTFA_WR_FSTAT_CCIF(base, value) (FTFA_RMW_FSTAT(base, (FTFA_FSTAT_CCIF_MASK | FTFA_FSTAT_FP…
DMKW40Z4.h2223 #define FTFA_FSTAT_CCIF_MASK 0x80u macro
2226 …(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSTAT_CCIF_SHIFT))&FTFA_FSTAT_CCIF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h2289 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2291 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h2360 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2362 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h2223 #define FTFA_FSTAT_CCIF_MASK 0x80u macro
2226 …(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSTAT_CCIF_SHIFT))&FTFA_FSTAT_CCIF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h2223 #define FTFA_FSTAT_CCIF_MASK 0x80u macro
2226 …(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSTAT_CCIF_SHIFT))&FTFA_FSTAT_CCIF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h10754 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
10760 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h10748 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
10754 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)