| /hal_nxp-2.7.6/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/ |
| D | ifr_radio.c | 202 …while ((FTFE_FSTAT_CCIF_MASK & FTFE->FSTAT) == 0); /* Wait till CCIF=1 to make sure not interrupti… in read_index_ifr()
204 if ((FTFE->FSTAT & FTFE_FSTAT_ACCERR_MASK) == FTFE_FSTAT_ACCERR_MASK ) in read_index_ifr()
206 FTFE->FSTAT = (1 << FTFE_FSTAT_ACCERR_SHIFT); /* Write 1 to ACCEER to clear errors */ in read_index_ifr()
213 FTFE->FSTAT = FTFE_FSTAT_CCIF_MASK; in read_index_ifr()
214 while((FTFE_FSTAT_CCIF_MASK & FTFE->FSTAT) == 0); /* Wait till CCIF=1 */ in read_index_ifr()
249 while ((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT) == 0); /* Wait till CCIF=1 */ in read_resource_ifr()
251 if ((FTFA->FSTAT & FTFA_FSTAT_ACCERR_MASK) == FTFA_FSTAT_ACCERR_MASK ) in read_resource_ifr()
253 FTFA->FSTAT = (1<<FTFA_FSTAT_ACCERR_SHIFT); /* Write 1 to ACCEER to clear errors */ in read_resource_ifr()
263 FTFA->FSTAT = FTFA_FSTAT_CCIF_MASK; in read_resource_ifr()
264 while ((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT) == 0); /* Wait till CCIF=1 */ in read_resource_ifr()
[all …]
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| /hal_nxp-2.7.6/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW40Z4/ |
| D | ifr_mkw40z4_radio.c | 137 while((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT)==0); /* Wait till CCIF=1 */ in read_resource_ifr()
140 if ((FTFA->FSTAT & FTFA_FSTAT_ACCERR_MASK)== FTFA_FSTAT_ACCERR_MASK ) in read_resource_ifr()
142 FTFA->FSTAT = (1<<FTFA_FSTAT_ACCERR_SHIFT); /* Write 1 to ACCEER to clear errors */ in read_resource_ifr()
154 FTFA->FSTAT = FTFA_FSTAT_CCIF_MASK; in read_resource_ifr()
155 while((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT)==0); /* Wait till CCIF=1 */ in read_resource_ifr()
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| /hal_nxp-2.7.6/mcux/drivers/kinetis/ |
| D | fsl_ftfx_controller.c | 1253 FTFx->FSTAT = FTFx_FSTAT_RDCOLERR_MASK | FTFx_FSTAT_ACCERR_MASK | FTFx_FSTAT_FPVIOL_MASK; in ftfx_command_sequence()
1263 callFtfxRunCommand((FTFx_REG8_ACCESS_TYPE)(&FTFx->FSTAT)); in ftfx_command_sequence()
1267 FTFx->FSTAT = FTFx_FSTAT_RDCOLERR_MASK | FTFx_FSTAT_ACCERR_MASK | FTFx_FSTAT_FPVIOL_MASK; in ftfx_command_sequence()
1270 FTFx->FSTAT = FTFx_FSTAT_CCIF_MASK; in ftfx_command_sequence()
1274 while (!(FTFx->FSTAT & FTFx_FSTAT_CCIF_MASK)) in ftfx_command_sequence()
1281 registerValue = FTFx->FSTAT; in ftfx_command_sequence()
1308 FTFx->FSTAT = FTFx_FSTAT_RDCOLERR_MASK | FTFx_FSTAT_ACCERR_MASK | FTFx_FSTAT_FPVIOL_MASK; in ftfx_command_sequence_non_blocking()
1318 callFtfxRunCommand((FTFx_REG8_ACCESS_TYPE)(&FTFx->FSTAT)); in ftfx_command_sequence_non_blocking()
1322 FTFx->FSTAT = FTFx_FSTAT_RDCOLERR_MASK | FTFx_FSTAT_ACCERR_MASK | FTFx_FSTAT_FPVIOL_MASK; in ftfx_command_sequence_non_blocking()
1325 FTFx->FSTAT = FTFx_FSTAT_CCIF_MASK; in ftfx_command_sequence_non_blocking()
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| D | fsl_ftfx_flexnvm.c | 304 if (0U != (FTFx->FSTAT & FTFx_FSTAT_FPVIOL_MASK)) in FLEXNVM_EepromWrite()
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| D | fsl_ftfx_flash.c | 1513 registerValue = FTFx->FSTAT; in FLASH_GetCommandState()
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| /hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
| D | MKL25Z4.h | 1164 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
| D | MKW40Z4.h | 2100 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
2153 #define FTFA_FSTAT_REG(base) ((base)->FSTAT)
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| /hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
| D | MKW20Z4.h | 2100 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
2153 #define FTFA_FSTAT_REG(base) ((base)->FSTAT)
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| /hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
| D | MKW30Z4.h | 2100 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
2153 #define FTFA_FSTAT_REG(base) ((base)->FSTAT)
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| /hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
| D | MK22F51212.h | 4178 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
| D | MKW24D5.h | 2827 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKE14F16/ |
| D | MKE14F16.h | 4743 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
| D | MKW22D5.h | 2827 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKE16F16/ |
| D | MKE16F16.h | 5547 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKE18F16/ |
| D | MKE18F16.h | 5552 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
| D | MKW31Z4.h | 2296 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MK64F12/ |
| D | MK64F12.h | 12294 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
| D | MKW21Z4.h | 2225 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
| D | MKW41Z4.h | 2296 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
| D | MKV56F24.h | 10592 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
| D | MK80F25615.h | 10677 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
| D | MKV58F24.h | 11932 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
| D | MK82F25615.h | 10671 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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| /hal_nxp-2.7.6/mcux/devices/MK66F18/ |
| D | MK66F18.h | 11630 __IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */ member
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