| /hal_nxp-2.7.6/mcux/drivers/kinetis/ |
| D | fsl_cmp.c | 254 base->FPR = CMP_FPR_FILT_PER(config->filterPeriod); in CMP_SetFilterConfig()
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| /hal_nxp-2.7.6/mcux/drivers/imx/ |
| D | fsl_cmp.c | 254 base->FPR = CMP_FPR_FILT_PER(config->filterPeriod); in CMP_SetFilterConfig()
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| /hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
| D | MKL25Z4.h | 605 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
| D | MKW40Z4.h | 712 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
731 #define CMP_FPR_REG(base) ((base)->FPR)
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| /hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
| D | MKW20Z4.h | 712 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
731 #define CMP_FPR_REG(base) ((base)->FPR)
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| /hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
| D | MKW30Z4.h | 712 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
731 #define CMP_FPR_REG(base) ((base)->FPR)
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| /hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
| D | MK22F51212.h | 867 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
| D | MKW24D5.h | 1156 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
| D | MKW22D5.h | 1156 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
| D | MKW31Z4.h | 971 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MK64F12/ |
| D | MK64F12.h | 6529 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
| D | MKW21Z4.h | 900 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
| D | MKW41Z4.h | 971 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
| D | MKV56F24.h | 5927 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
| D | MK80F25615.h | 4785 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
| D | MKV58F24.h | 5931 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
| D | MK82F25615.h | 4779 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MK66F18/ |
| D | MK66F18.h | 5580 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 8715 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 8697 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 8541 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 9753 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 9730 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 11091 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 11039 __IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */ member
|
