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Searched refs:FLEXFRGXCTRL (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/LPC55S28/
Dfsl_clock.c855 temp = SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_MULT_MASK; in CLOCK_GetFlexCommClkFreq()
856 return freq / (1U + (temp) / ((SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_DIV_MASK) + 1U)); in CLOCK_GetFlexCommClkFreq()
990 SYSCON->FLEXFRGXCTRL[id] = (mul << 8U) | 0xFFU; in CLOCK_SetFlexCommClock()
DLPC55S28.h20231 …__IO uint32_t FLEXFRGXCTRL[8]; /**< Peripheral reset control register, array off… member
/hal_nxp-2.7.6/mcux/devices/LPC55S69/
Dfsl_clock.c855 temp = SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_MULT_MASK; in CLOCK_GetFlexCommClkFreq()
856 return freq / (1U + (temp) / ((SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_DIV_MASK) + 1U)); in CLOCK_GetFlexCommClkFreq()
990 SYSCON->FLEXFRGXCTRL[id] = (mul << 8U) | 0xFFU; in CLOCK_SetFlexCommClock()
DLPC55S69_cm33_core0.h20831 …__IO uint32_t FLEXFRGXCTRL[8]; /**< Peripheral reset control register, array off… member
DLPC55S69_cm33_core1.h20831 …__IO uint32_t FLEXFRGXCTRL[8]; /**< Peripheral reset control register, array off… member
/hal_nxp-2.7.6/mcux/devices/LPC55S16/
Dfsl_clock.c823 return freq / (1UL + (SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_MULT_MASK) / in CLOCK_GetFlexCommClkFreq()
824 ((SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_DIV_MASK) + 1UL)); in CLOCK_GetFlexCommClkFreq()
958 SYSCON->FLEXFRGXCTRL[id] = (mul << 8U) | 0xFFU; in CLOCK_SetFlexCommClock()
DLPC55S16.h20505 …__IO uint32_t FLEXFRGXCTRL[8]; /**< Peripheral reset control register, array off… member