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Searched refs:FIFOINTENSET (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/imxrt6xx/
Dfsl_i2s.h453 base->FIFOINTENSET = interruptMask; in I2S_EnableInterrupts()
478 return base->FIFOINTENSET; in I2S_GetEnabledInterrupts()
Dfsl_usart.h438 base->FIFOINTENSET = mask & 0xFUL; in USART_EnableInterrupts()
468 return base->FIFOINTENSET; in USART_GetEnabledInterrupts()
Dfsl_spi.c695 base->FIFOINTENSET |= SPI_FIFOINTENSET_TXLVL_MASK | SPI_FIFOINTENSET_RXLVL_MASK; in SPI_MasterTransferNonBlocking()
878 base->FIFOINTENSET &= ~(SPI_FIFOINTENSET_TXLVL_MASK | SPI_FIFOINTENSET_RXLVL_MASK); in SPI_MasterTransferAbort()
1024 base->FIFOINTENSET |= SPI_FIFOINTENSET_TXLVL_MASK; in SPI_MasterTransferHandleIRQ()
Dfsl_usart.c145 base->FIFOINTENSET = USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK; in USART_TransferStartRingBuffer()
945 base->FIFOINTENSET = USART_FIFOINTENSET_RXLVL_MASK; in USART_TransferReceiveNonBlocking()
Dfsl_spi.h450 base->FIFOINTENSET = irqs; in SPI_EnableInterrupts()
/hal_nxp-2.7.6/mcux/drivers/lpc/
Dfsl_i2s.h453 base->FIFOINTENSET = interruptMask; in I2S_EnableInterrupts()
478 return base->FIFOINTENSET; in I2S_GetEnabledInterrupts()
Dfsl_usart.h438 base->FIFOINTENSET = mask & 0xFUL; in USART_EnableInterrupts()
468 return base->FIFOINTENSET; in USART_GetEnabledInterrupts()
Dfsl_spi.c695 base->FIFOINTENSET |= SPI_FIFOINTENSET_TXLVL_MASK | SPI_FIFOINTENSET_RXLVL_MASK; in SPI_MasterTransferNonBlocking()
878 base->FIFOINTENSET &= ~(SPI_FIFOINTENSET_TXLVL_MASK | SPI_FIFOINTENSET_RXLVL_MASK); in SPI_MasterTransferAbort()
1024 base->FIFOINTENSET |= SPI_FIFOINTENSET_TXLVL_MASK; in SPI_MasterTransferHandleIRQ()
Dfsl_usart.c145 base->FIFOINTENSET = USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK; in USART_TransferStartRingBuffer()
945 base->FIFOINTENSET = USART_FIFOINTENSET_RXLVL_MASK; in USART_TransferReceiveNonBlocking()
Dfsl_spi.h450 base->FIFOINTENSET = irqs; in SPI_EnableInterrupts()
/hal_nxp-2.7.6/mcux/devices/LPC54114/
DLPC54114_cm0plus.h3905 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
7270 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
10360 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
DLPC54114_cm4.h3916 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
7281 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
10373 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
/hal_nxp-2.7.6/mcux/devices/LPC55S28/
DLPC55S28.h11469 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
19197 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
24183 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
/hal_nxp-2.7.6/mcux/devices/LPC55S69/
DLPC55S69_cm33_core0.h11469 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
19795 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
24815 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
DLPC55S69_cm33_core1.h11469 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
19795 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
24815 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
/hal_nxp-2.7.6/mcux/devices/LPC55S16/
DLPC55S16.h13108 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
19537 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
24090 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
/hal_nxp-2.7.6/mcux/devices/MIMXRT685S/
DMIMXRT685S_dsp.h9652 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
20758 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
29049 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
DMIMXRT685S_cm33.h14823 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
27468 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member
34927 …__IO uint32_t FIFOINTENSET; /**< FIFO interrupt enable set (enable) and read … member