/hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
D | MKL25Z4.h | 985 #define DMA_BASE (0x40008000u) macro 987 #define DMA0 ((DMA_Type *)DMA_BASE) 989 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
D | MK22F51212.h | 3306 #define DMA_BASE (0x40008000u) macro 3308 #define DMA0 ((DMA_Type *)DMA_BASE) 3310 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
D | MKW24D5.h | 2467 #define DMA_BASE (0x40008000u) macro 2469 #define DMA0 ((DMA_Type *)DMA_BASE) 2471 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKE14F16/ |
D | MKE14F16.h | 3997 #define DMA_BASE (0x40008000u) macro 3999 #define DMA0 ((DMA_Type *)DMA_BASE) 4001 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
D | MKW22D5.h | 2467 #define DMA_BASE (0x40008000u) macro 2469 #define DMA0 ((DMA_Type *)DMA_BASE) 2471 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKE16F16/ |
D | MKE16F16.h | 4800 #define DMA_BASE (0x40008000u) macro 4802 #define DMA0 ((DMA_Type *)DMA_BASE) 4804 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKE18F16/ |
D | MKE18F16.h | 4804 #define DMA_BASE (0x40008000u) macro 4806 #define DMA0 ((DMA_Type *)DMA_BASE) 4808 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
D | MKW31Z4.h | 2125 #define DMA_BASE (0x40008000u) macro 2127 #define DMA0 ((DMA_Type *)DMA_BASE) 2129 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK64F12/ |
D | MK64F12.h | 9546 #define DMA_BASE (0x40008000u) macro 9548 #define DMA0 ((DMA_Type *)DMA_BASE) 9550 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
D | MKW40Z4.h | 1775 #define DMA_BASE (0x40008000u) macro 1777 #define DMA0 ((DMA_Type *)DMA_BASE) 1780 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
D | MKW21Z4.h | 2054 #define DMA_BASE (0x40008000u) macro 2056 #define DMA0 ((DMA_Type *)DMA_BASE) 2058 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
D | MKW41Z4.h | 2125 #define DMA_BASE (0x40008000u) macro 2127 #define DMA0 ((DMA_Type *)DMA_BASE) 2129 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
D | MKW20Z4.h | 1775 #define DMA_BASE (0x40008000u) macro 1777 #define DMA0 ((DMA_Type *)DMA_BASE) 1780 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
D | MKW30Z4.h | 1775 #define DMA_BASE (0x40008000u) macro 1777 #define DMA0 ((DMA_Type *)DMA_BASE) 1780 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
D | MKV56F24.h | 9510 #define DMA_BASE (0x40008000u) macro 9512 #define DMA0 ((DMA_Type *)DMA_BASE) 9514 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
D | MK80F25615.h | 8585 #define DMA_BASE (0x40008000u) macro 8587 #define DMA0 ((DMA_Type *)DMA_BASE) 8589 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
D | MKV58F24.h | 9514 #define DMA_BASE (0x40008000u) macro 9516 #define DMA0 ((DMA_Type *)DMA_BASE) 9518 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
D | MK82F25615.h | 8579 #define DMA_BASE (0x40008000u) macro 8581 #define DMA0 ((DMA_Type *)DMA_BASE) 8583 #define DMA_BASE_ADDRS { DMA_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK66F18/ |
D | MK66F18.h | 9399 #define DMA_BASE (0x40008000u) macro 9401 #define DMA0 ((DMA_Type *)DMA_BASE) 9403 #define DMA_BASE_ADDRS { DMA_BASE }
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