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Searched refs:DMAMUX_CHCFG_SOURCE_MASK (Results 1 – 25 of 33) sorted by relevance

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/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_dmamux.h114 …base->CHCFG[channel] = ((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_SOURCE(s… in DMAMUX_SetSource()
116 …base->CHCFG[channel] = (uint8_t)((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG… in DMAMUX_SetSource()
/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_dmamux.h114 …base->CHCFG[channel] = ((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_SOURCE(s… in DMAMUX_SetSource()
116 …base->CHCFG[channel] = (uint8_t)((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG… in DMAMUX_SetSource()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h1024 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
1026 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h3347 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
3403 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h2507 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
2509 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h4038 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
4101 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h2507 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
2509 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h4841 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
4905 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h4845 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
4910 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h2164 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
2166 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h9588 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
9655 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h1879 #define DMAMUX_CHCFG_SOURCE_MASK 0x3Fu macro
1882 … (((uint8_t)(((uint8_t)(x))<<DMAMUX_CHCFG_SOURCE_SHIFT))&DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h2093 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
2095 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h2164 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
2166 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h1879 #define DMAMUX_CHCFG_SOURCE_MASK 0x3Fu macro
1882 … (((uint8_t)(((uint8_t)(x))<<DMAMUX_CHCFG_SOURCE_SHIFT))&DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h1879 #define DMAMUX_CHCFG_SOURCE_MASK 0x3Fu macro
1882 … (((uint8_t)(((uint8_t)(x))<<DMAMUX_CHCFG_SOURCE_SHIFT))&DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h9551 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
9613 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h8626 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
8687 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h9555 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
9617 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h8620 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
8681 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h9440 #define DMAMUX_CHCFG_SOURCE_MASK (0x3FU) macro
9507 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h10206 #define DMAMUX_CHCFG_SOURCE_MASK (0x7FU) macro
10210 … (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h12215 #define DMAMUX_CHCFG_SOURCE_MASK (0x7FU) macro
12219 … (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h15554 #define DMAMUX_CHCFG_SOURCE_MASK (0x7FU) macro
15558 … (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h15536 #define DMAMUX_CHCFG_SOURCE_MASK (0x7FU) macro
15540 … (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)

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