| /hal_nxp-2.7.6/mcux/drivers/kinetis/ |
| D | fsl_tpm.c | 323 base->CONTROLS[(uint32_t)chnlParams->chnlNumber * 2U].CnSC &= in TPM_SetupPwm()
327 while (0U != (base->CONTROLS[(uint32_t)chnlParams->chnlNumber * 2U].CnSC & in TPM_SetupPwm()
333 base->CONTROLS[(uint32_t)chnlParams->chnlNumber * 2U].CnSC |= in TPM_SetupPwm()
337 while (0U == (base->CONTROLS[(uint32_t)chnlParams->chnlNumber * 2U].CnSC & in TPM_SetupPwm()
342 base->CONTROLS[(uint16_t)chnlParams->chnlNumber * 2U].CnV = cnvFirstEdge; in TPM_SetupPwm()
345 base->CONTROLS[((uint32_t)chnlParams->chnlNumber * 2U) + 1U].CnSC &= in TPM_SetupPwm()
349 while (0U != (base->CONTROLS[((uint32_t)chnlParams->chnlNumber * 2U) + 1U].CnSC & in TPM_SetupPwm()
355 base->CONTROLS[((uint32_t)chnlParams->chnlNumber * 2U) + 1U].CnSC |= in TPM_SetupPwm()
359 while (0U == (base->CONTROLS[((uint32_t)chnlParams->chnlNumber * 2U) + 1U].CnSC & in TPM_SetupPwm()
364 …base->CONTROLS[((uint16_t)chnlParams->chnlNumber * 2u) + 1u].CnV = (uint32_t)cnvFirstEdge + (uint3… in TPM_SetupPwm()
[all …]
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| D | fsl_ftm.c | 470 reg = base->CONTROLS[chnlParams->chnlNumber].CnSC; in FTM_SetupPwm()
480 base->CONTROLS[chnlParams->chnlNumber].CnSC = reg; in FTM_SetupPwm()
482 base->CONTROLS[chnlParams->chnlNumber].CnV = cnv; in FTM_SetupPwm()
531 reg = base->CONTROLS[((uint32_t)chnlParams->chnlNumber) * 2U].CnSC; in FTM_SetupPwm()
538 base->CONTROLS[((uint32_t)chnlParams->chnlNumber) * 2U].CnSC = reg; in FTM_SetupPwm()
541 reg = base->CONTROLS[(((uint32_t)chnlParams->chnlNumber) * 2U) + 1U].CnSC; in FTM_SetupPwm()
548 base->CONTROLS[(((uint32_t)chnlParams->chnlNumber) * 2U) + 1U].CnSC = reg; in FTM_SetupPwm()
555 base->CONTROLS[((uint32_t)chnlParams->chnlNumber) * 2U].CnV = cnvFirstEdge; in FTM_SetupPwm()
556 base->CONTROLS[(((uint32_t)chnlParams->chnlNumber) * 2U) + 1U].CnV = cnvFirstEdge + cnv; in FTM_SetupPwm()
614 base->CONTROLS[chnlNumber].CnV = cnv; in FTM_UpdatePwmDutycycle()
[all …]
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| D | fsl_ftm.h | 685 return (base->CONTROLS[chnlNumber].CnV & FTM_CnV_VAL_MASK); in FTM_GetInputCaptureValue()
1044 base->CONTROLS[chnlNumber].CnSC |= FTM_CnSC_DMA_MASK; in FTM_EnableDmaTransfer()
1049 base->CONTROLS[chnlNumber].CnSC &= ~FTM_CnSC_DMA_MASK; in FTM_EnableDmaTransfer()
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| D | fsl_tpm.h | 507 if (base->CONTROLS[chanlNumber].CnSC & TPM_CnSC_CHF_MASK) in TPM_GetStatusFlags()
542 base->CONTROLS[chnlNumber].CnSC &= ~TPM_CnSC_CHF_MASK; in TPM_ClearStatusFlags()
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| D | fsl_smartcard_phy_tda8035.c | 125 ftmBase->CONTROLS[config->clockModuleChannel].CnSC = (FTM_CnSC_ELSA_MASK | FTM_CnSC_MSA_MASK); in smartcard_phy_tda8035_InterfaceClockInit()
127 ftmBase->CONTROLS[config->clockModuleChannel].CnV = 1; in smartcard_phy_tda8035_InterfaceClockInit()
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| /hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
| D | MKW40Z4.h | 7828 } CONTROLS[4]; member
7854 #define TPM_CnSC_REG(base,index) ((base)->CONTROLS[index].CnSC)
7856 #define TPM_CnV_REG(base,index) ((base)->CONTROLS[index].CnV)
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| /hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
| D | MKW20Z4.h | 7828 } CONTROLS[4]; member
7854 #define TPM_CnSC_REG(base,index) ((base)->CONTROLS[index].CnSC)
7856 #define TPM_CnV_REG(base,index) ((base)->CONTROLS[index].CnV)
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| /hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
| D | MKW30Z4.h | 7828 } CONTROLS[4]; member
7854 #define TPM_CnSC_REG(base,index) ((base)->CONTROLS[index].CnSC)
7856 #define TPM_CnV_REG(base,index) ((base)->CONTROLS[index].CnV)
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| /hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
| D | MKL25Z4.h | 4177 } CONTROLS[6]; member
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| /hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
| D | MK80F25615.h | 11206 } CONTROLS[8]; member
23761 } CONTROLS[2]; member
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| /hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
| D | MK82F25615.h | 11200 } CONTROLS[8]; member
24741 } CONTROLS[2]; member
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| /hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
| D | MK22F51212.h | 4707 } CONTROLS[8]; member
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| /hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
| D | MKW24D5.h | 3054 } CONTROLS[8]; member
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| /hal_nxp-2.7.6/mcux/devices/MKE14F16/ |
| D | MKE14F16.h | 5348 } CONTROLS[8]; member
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| /hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
| D | MKW22D5.h | 3054 } CONTROLS[8]; member
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| /hal_nxp-2.7.6/mcux/devices/MK66F18/ |
| D | MK66F18.h | 12210 } CONTROLS[8]; member
23923 } CONTROLS[2]; member
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| /hal_nxp-2.7.6/mcux/devices/MKE16F16/ |
| D | MKE16F16.h | 6152 } CONTROLS[8]; member
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| /hal_nxp-2.7.6/mcux/devices/MKE18F16/ |
| D | MKE18F16.h | 6157 } CONTROLS[8]; member
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| /hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
| D | MKW31Z4.h | 7011 } CONTROLS[4]; member
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| /hal_nxp-2.7.6/mcux/devices/MK64F12/ |
| D | MK64F12.h | 12710 } CONTROLS[8]; member
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| /hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
| D | MKW21Z4.h | 6940 } CONTROLS[4]; member
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| /hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
| D | MKW41Z4.h | 7011 } CONTROLS[4]; member
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| /hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
| D | MKV56F24.h | 10923 } CONTROLS[8]; member
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| /hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
| D | MKV58F24.h | 12263 } CONTROLS[8]; member
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