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Searched refs:CMP_MUXCR_PSTM_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_cmp.h249 base->MUXCR |= CMP_MUXCR_PSTM_MASK; in CMP_EnablePassThroughMode()
253 base->MUXCR &= (uint8_t)(~CMP_MUXCR_PSTM_MASK); in CMP_EnablePassThroughMode()
/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_cmp.h249 base->MUXCR |= CMP_MUXCR_PSTM_MASK; in CMP_EnablePassThroughMode()
253 base->MUXCR &= (uint8_t)(~CMP_MUXCR_PSTM_MASK); in CMP_EnablePassThroughMode()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h697 #define CMP_MUXCR_PSTM_MASK (0x80U) macro
699 … (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSTM_SHIFT)) & CMP_MUXCR_PSTM_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h1245 #define CMP_MUXCR_PSTM_MASK (0x80U) macro
1247 … (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSTM_SHIFT)) & CMP_MUXCR_PSTM_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h1245 #define CMP_MUXCR_PSTM_MASK (0x80U) macro
1247 … (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSTM_SHIFT)) & CMP_MUXCR_PSTM_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h1063 #define CMP_MUXCR_PSTM_MASK (0x80U) macro
1065 … (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSTM_SHIFT)) & CMP_MUXCR_PSTM_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h6751 #define CMP_MUXCR_PSTM_MASK (0x80U) macro
6757 … (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSTM_SHIFT)) & CMP_MUXCR_PSTM_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h844 #define CMP_MUXCR_PSTM_MASK 0x80u macro
847 …M(x) (((uint8_t)(((uint8_t)(x))<<CMP_MUXCR_PSTM_SHIFT))&CMP_MUXCR_PSTM_MASK)
DMKW40Z4_extension.h2640 #define CMP_RD_MUXCR_PSTM(base) ((CMP_MUXCR_REG(base) & CMP_MUXCR_PSTM_MASK) >> CMP_MUXCR_PSTM_SHIF…
2644 #define CMP_WR_MUXCR_PSTM(base, value) (CMP_RMW_MUXCR(base, CMP_MUXCR_PSTM_MASK, CMP_MUXCR_PSTM(val…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h992 #define CMP_MUXCR_PSTM_MASK (0x80U) macro
994 … (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSTM_SHIFT)) & CMP_MUXCR_PSTM_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h1063 #define CMP_MUXCR_PSTM_MASK (0x80U) macro
1065 … (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSTM_SHIFT)) & CMP_MUXCR_PSTM_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h844 #define CMP_MUXCR_PSTM_MASK 0x80u macro
847 …M(x) (((uint8_t)(((uint8_t)(x))<<CMP_MUXCR_PSTM_SHIFT))&CMP_MUXCR_PSTM_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h844 #define CMP_MUXCR_PSTM_MASK 0x80u macro
847 …M(x) (((uint8_t)(((uint8_t)(x))<<CMP_MUXCR_PSTM_SHIFT))&CMP_MUXCR_PSTM_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h5779 #define CMP_MUXCR_PSTM_MASK (0x80U) macro
5785 … (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSTM_SHIFT)) & CMP_MUXCR_PSTM_MASK)