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Searched refs:CMP_MUXCR_PSEL_SHIFT (Results 1 – 24 of 24) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h695 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
696 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h1054 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
1065 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h1243 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
1244 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h1243 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
1244 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h1061 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
1062 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h6738 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
6749 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h841 #define CMP_MUXCR_PSEL_SHIFT 3 macro
843 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x))<<CMP_MUXCR_PSEL_SHIFT))…
DMKW40Z4_extension.h2619 …efine CMP_RD_MUXCR_PSEL(base) ((CMP_MUXCR_REG(base) & CMP_MUXCR_PSEL_MASK) >> CMP_MUXCR_PSEL_SHIFT)
2620 #define CMP_BRD_MUXCR_PSEL(base) (BME_UBFX8(&CMP_MUXCR_REG(base), CMP_MUXCR_PSEL_SHIFT, CMP_MUXCR_P…
2624 …) (BME_BFI8(&CMP_MUXCR_REG(base), ((uint8_t)(value) << CMP_MUXCR_PSEL_SHIFT), CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h990 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
991 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h1061 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
1062 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h841 #define CMP_MUXCR_PSEL_SHIFT 3 macro
843 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x))<<CMP_MUXCR_PSEL_SHIFT))…
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h841 #define CMP_MUXCR_PSEL_SHIFT 3 macro
843 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x))<<CMP_MUXCR_PSEL_SHIFT))…
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h6114 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
6125 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h4972 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
4983 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h6118 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
6129 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h4966 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
4977 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h5767 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
5778 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h8924 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
8935 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h8906 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
8917 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h8729 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
8740 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h9962 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
9973 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h9918 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
9929 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h11300 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
11311 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h11248 #define CMP_MUXCR_PSEL_SHIFT (3U) macro
11259 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT