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Searched refs:CMP_DACCR_VOSEL_MASK (Results 1 – 24 of 24) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h680 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
682 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h1019 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
1021 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h1228 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
1230 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h1228 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
1230 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h1046 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
1048 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h6697 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
6701 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h823 #define CMP_DACCR_VOSEL_MASK 0x3Fu macro
826 …(x) (((uint8_t)(((uint8_t)(x))<<CMP_DACCR_VOSEL_SHIFT))&CMP_DACCR_VOSEL_MASK)
DMKW40Z4_extension.h2501 #define CMP_RD_DACCR_VOSEL(base) ((CMP_DACCR_REG(base) & CMP_DACCR_VOSEL_MASK) >> CMP_DACCR_VOSEL_S…
2505 #define CMP_WR_DACCR_VOSEL(base, value) (CMP_RMW_DACCR(base, CMP_DACCR_VOSEL_MASK, CMP_DACCR_VOSEL(…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h975 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
977 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h1046 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
1048 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h823 #define CMP_DACCR_VOSEL_MASK 0x3Fu macro
826 …(x) (((uint8_t)(((uint8_t)(x))<<CMP_DACCR_VOSEL_SHIFT))&CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h823 #define CMP_DACCR_VOSEL_MASK 0x3Fu macro
826 …(x) (((uint8_t)(((uint8_t)(x))<<CMP_DACCR_VOSEL_SHIFT))&CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h6079 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
6081 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h4937 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
4939 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h6083 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
6085 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h4931 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
4933 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h5732 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
5734 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h8883 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
8887 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h8865 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
8869 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h8692 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
8696 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h9921 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
9925 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h9881 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
9885 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h11259 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
11263 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h11207 #define CMP_DACCR_VOSEL_MASK (0x3FU) macro
11211 … (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)