| /hal_nxp-2.7.6/mcux/drivers/kinetis/ |
| D | fsl_cmp.h | 229 base->CR1 |= CMP_CR1_WE_MASK; in CMP_EnableWindowMode()
233 base->CR1 &= (uint8_t)(~CMP_CR1_WE_MASK); in CMP_EnableWindowMode()
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| /hal_nxp-2.7.6/mcux/drivers/imx/ |
| D | fsl_cmp.h | 229 base->CR1 |= CMP_CR1_WE_MASK; in CMP_EnableWindowMode()
233 base->CR1 &= (uint8_t)(~CMP_CR1_WE_MASK); in CMP_EnableWindowMode()
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| /hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
| D | MKL25Z4.h | 647 #define CMP_CR1_WE_MASK (0x40U) macro
649 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
| D | MK22F51212.h | 952 #define CMP_CR1_WE_MASK (0x40U) macro
958 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
| D | MKW24D5.h | 1195 #define CMP_CR1_WE_MASK (0x40U) macro
1197 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
| D | MKW22D5.h | 1195 #define CMP_CR1_WE_MASK (0x40U) macro
1197 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
| D | MKW31Z4.h | 1013 #define CMP_CR1_WE_MASK (0x40U) macro
1015 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK64F12/ |
| D | MK64F12.h | 6617 #define CMP_CR1_WE_MASK (0x40U) macro
6623 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
| D | MKW40Z4.h | 784 #define CMP_CR1_WE_MASK 0x40u macro
787 …R1_WE(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_WE_SHIFT))&CMP_CR1_WE_MASK)
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| D | MKW40Z4_extension.h | 2281 #define CMP_RD_CR1_WE(base) ((CMP_CR1_REG(base) & CMP_CR1_WE_MASK) >> CMP_CR1_WE_SHIFT)
2285 #define CMP_WR_CR1_WE(base, value) (CMP_RMW_CR1(base, CMP_CR1_WE_MASK, CMP_CR1_WE(value)))
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| /hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
| D | MKW21Z4.h | 942 #define CMP_CR1_WE_MASK (0x40U) macro
944 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
| D | MKW41Z4.h | 1013 #define CMP_CR1_WE_MASK (0x40U) macro
1015 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
| D | MKW20Z4.h | 784 #define CMP_CR1_WE_MASK 0x40u macro
787 …R1_WE(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_WE_SHIFT))&CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
| D | MKW30Z4.h | 784 #define CMP_CR1_WE_MASK 0x40u macro
787 …R1_WE(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_WE_SHIFT))&CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
| D | MKV56F24.h | 6012 #define CMP_CR1_WE_MASK (0x40U) macro
6018 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
| D | MK80F25615.h | 4870 #define CMP_CR1_WE_MASK (0x40U) macro
4876 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
| D | MKV58F24.h | 6016 #define CMP_CR1_WE_MASK (0x40U) macro
6022 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
| D | MK82F25615.h | 4864 #define CMP_CR1_WE_MASK (0x40U) macro
4870 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK66F18/ |
| D | MK66F18.h | 5665 #define CMP_CR1_WE_MASK (0x40U) macro
5671 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 8803 #define CMP_CR1_WE_MASK (0x40U) macro
8809 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 8785 #define CMP_CR1_WE_MASK (0x40U) macro
8791 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 8621 #define CMP_CR1_WE_MASK (0x40U) macro
8627 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 9841 #define CMP_CR1_WE_MASK (0x40U) macro
9847 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 9810 #define CMP_CR1_WE_MASK (0x40U) macro
9816 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 11179 #define CMP_CR1_WE_MASK (0x40U) macro
11185 …E(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
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