/hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
D | MKL25Z4.h | 709 #define CMP0_BASE (0x40073000u) macro 711 #define CMP0 ((CMP_Type *)CMP0_BASE) 713 #define CMP_BASE_ADDRS { CMP0_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
D | MK22F51212.h | 1076 #define CMP0_BASE (0x40073000u) macro 1078 #define CMP0 ((CMP_Type *)CMP0_BASE) 1084 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
D | MKW24D5.h | 1257 #define CMP0_BASE (0x40073000u) macro 1259 #define CMP0 ((CMP_Type *)CMP0_BASE) 1265 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKE14F16/ |
D | MKE14F16.h | 1778 #define CMP0_BASE (0x40073000u) macro 1780 #define CMP0 ((CMP_Type *)CMP0_BASE) 1790 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
D | MKW22D5.h | 1257 #define CMP0_BASE (0x40073000u) macro 1259 #define CMP0 ((CMP_Type *)CMP0_BASE) 1265 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKE16F16/ |
D | MKE16F16.h | 2581 #define CMP0_BASE (0x40073000u) macro 2583 #define CMP0 ((CMP_Type *)CMP0_BASE) 2593 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKE18F16/ |
D | MKE18F16.h | 2585 #define CMP0_BASE (0x40073000u) macro 2587 #define CMP0 ((CMP_Type *)CMP0_BASE) 2597 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
D | MKW31Z4.h | 1075 #define CMP0_BASE (0x40073000u) macro 1077 #define CMP0 ((CMP_Type *)CMP0_BASE) 1079 #define CMP_BASE_ADDRS { CMP0_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK64F12/ |
D | MK64F12.h | 6768 #define CMP0_BASE (0x40073000u) macro 6770 #define CMP0 ((CMP_Type *)CMP0_BASE) 6780 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
D | MKW40Z4.h | 856 #define CMP0_BASE (0x40073000u) macro 858 #define CMP0 ((CMP_Type *)CMP0_BASE) 861 #define CMP_BASE_ADDRS { CMP0_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
D | MKW21Z4.h | 1004 #define CMP0_BASE (0x40073000u) macro 1006 #define CMP0 ((CMP_Type *)CMP0_BASE) 1008 #define CMP_BASE_ADDRS { CMP0_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
D | MKW41Z4.h | 1075 #define CMP0_BASE (0x40073000u) macro 1077 #define CMP0 ((CMP_Type *)CMP0_BASE) 1079 #define CMP_BASE_ADDRS { CMP0_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
D | MKW20Z4.h | 856 #define CMP0_BASE (0x40073000u) macro 858 #define CMP0 ((CMP_Type *)CMP0_BASE) 861 #define CMP_BASE_ADDRS { CMP0_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
D | MKW30Z4.h | 856 #define CMP0_BASE (0x40073000u) macro 858 #define CMP0 ((CMP_Type *)CMP0_BASE) 861 #define CMP_BASE_ADDRS { CMP0_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
D | MKV56F24.h | 6136 #define CMP0_BASE (0x40073000u) macro 6138 #define CMP0 ((CMP_Type *)CMP0_BASE) 6152 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE, CMP3_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
D | MK80F25615.h | 4994 #define CMP0_BASE (0x40073000u) macro 4996 #define CMP0 ((CMP_Type *)CMP0_BASE) 5002 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
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/hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
D | MKV58F24.h | 6140 #define CMP0_BASE (0x40073000u) macro 6142 #define CMP0 ((CMP_Type *)CMP0_BASE) 6156 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE, CMP3_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
D | MK82F25615.h | 4988 #define CMP0_BASE (0x40073000u) macro 4990 #define CMP0 ((CMP_Type *)CMP0_BASE) 4996 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
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/hal_nxp-2.7.6/mcux/devices/MK66F18/ |
D | MK66F18.h | 5796 #define CMP0_BASE (0x40073000u) macro 5798 #define CMP0 ((CMP_Type *)CMP0_BASE) 5812 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE, CMP3_BASE }
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