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Searched refs:CHPLLIM (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h39204 …__IO uint32_t CHPLLIM; /**< Chroma PLL and Input Mode, offset: 0xA… member
39270 #define VDEC_CHPLLIM_REG(base) ((base)->CHPLLIM)