/hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
D | fsl_clock.c | 856 uint8_t mcg_c8 = MCG->C8; in CLOCK_SetRtcOscMonitorMode() 868 MCG->C8 = mcg_c8; in CLOCK_SetRtcOscMonitorMode() 884 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 896 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode() 914 if (MCG->C8 & MCG_C8_LOCS1_MASK) in CLOCK_GetStatusFlags() 939 reg = MCG->C8; in CLOCK_ClearStatusFlags() 940 MCG->C8 = reg; in CLOCK_ClearStatusFlags()
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D | MKW22D5.h | 4763 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
D | fsl_clock.c | 856 uint8_t mcg_c8 = MCG->C8; in CLOCK_SetRtcOscMonitorMode() 868 MCG->C8 = mcg_c8; in CLOCK_SetRtcOscMonitorMode() 884 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 896 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode() 914 if (MCG->C8 & MCG_C8_LOCS1_MASK) in CLOCK_GetStatusFlags() 939 reg = MCG->C8; in CLOCK_ClearStatusFlags() 940 MCG->C8 = reg; in CLOCK_ClearStatusFlags()
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D | MKW24D5.h | 4763 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
D | fsl_clock.c | 1107 uint8_t mcg_c8 = MCG->C8; in CLOCK_SetRtcOscMonitorMode() 1119 MCG->C8 = mcg_c8; in CLOCK_SetRtcOscMonitorMode() 1142 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 1154 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode() 1198 if (0U != (MCG->C8 & MCG_C8_LOCS1_MASK)) in CLOCK_GetStatusFlags() 1239 reg = MCG->C8; in CLOCK_ClearStatusFlags() 1240 MCG->C8 = reg; in CLOCK_ClearStatusFlags()
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D | MK22F51212.h | 8633 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MK64F12/ |
D | fsl_clock.c | 1074 uint8_t mcg_c8 = MCG->C8; in CLOCK_SetRtcOscMonitorMode() 1086 MCG->C8 = mcg_c8; in CLOCK_SetRtcOscMonitorMode() 1109 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 1121 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode() 1165 if (0U != (MCG->C8 & MCG_C8_LOCS1_MASK)) in CLOCK_GetStatusFlags() 1206 reg = MCG->C8; in CLOCK_ClearStatusFlags() 1207 MCG->C8 = reg; in CLOCK_ClearStatusFlags()
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D | MK64F12.h | 16495 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
D | fsl_clock.c | 1116 uint8_t mcg_c8 = MCG->C8; in CLOCK_SetRtcOscMonitorMode() 1128 MCG->C8 = mcg_c8; in CLOCK_SetRtcOscMonitorMode() 1151 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 1163 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode() 1207 if (0U != (MCG->C8 & MCG_C8_LOCS1_MASK)) in CLOCK_GetStatusFlags() 1248 reg = MCG->C8; in CLOCK_ClearStatusFlags() 1249 MCG->C8 = reg; in CLOCK_ClearStatusFlags()
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D | MK80F25615.h | 16331 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
D | fsl_clock.c | 1116 uint8_t mcg_c8 = MCG->C8; in CLOCK_SetRtcOscMonitorMode() 1128 MCG->C8 = mcg_c8; in CLOCK_SetRtcOscMonitorMode() 1151 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 1163 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode() 1207 if (0U != (MCG->C8 & MCG_C8_LOCS1_MASK)) in CLOCK_GetStatusFlags() 1248 reg = MCG->C8; in CLOCK_ClearStatusFlags() 1249 MCG->C8 = reg; in CLOCK_ClearStatusFlags()
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/hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
D | fsl_clock.c | 671 uint8_t mcg_c8 = MCG->C8; in CLOCK_SetRtcOscMonitorMode() 683 MCG->C8 = mcg_c8; in CLOCK_SetRtcOscMonitorMode() 691 if (MCG->C8 & MCG_C8_LOCS1_MASK) in CLOCK_GetStatusFlags() 704 reg = MCG->C8; in CLOCK_ClearStatusFlags() 705 MCG->C8 = reg; in CLOCK_ClearStatusFlags()
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D | MKW41Z4.h | 4320 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MK66F18/ |
D | fsl_clock.c | 1350 uint8_t mcg_c8 = MCG->C8; in CLOCK_SetRtcOscMonitorMode() 1362 MCG->C8 = mcg_c8; in CLOCK_SetRtcOscMonitorMode() 1385 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 1397 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode() 1466 if (0U != (MCG->C8 & MCG_C8_LOCS1_MASK)) in CLOCK_GetStatusFlags() 1511 reg = MCG->C8; in CLOCK_ClearStatusFlags() 1512 MCG->C8 = reg; in CLOCK_ClearStatusFlags()
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/hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
D | fsl_clock.c | 814 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 824 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode()
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D | MKL25Z4.h | 2008 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
D | fsl_clock.c | 1013 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 1023 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode()
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D | MKV58F24.h | 16269 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
D | fsl_clock.c | 1013 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode() 1023 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode()
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D | MKV56F24.h | 14929 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
D | MKW40Z4.h | 4328 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member 4353 #define MCG_C8_REG(base) ((base)->C8)
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/hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
D | MKW20Z4.h | 4328 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member 4353 #define MCG_C8_REG(base) ((base)->C8)
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/hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
D | MKW30Z4.h | 4328 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member 4353 #define MCG_C8_REG(base) ((base)->C8)
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/hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
D | MKW31Z4.h | 4320 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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/hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
D | MKW21Z4.h | 4249 __IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ member
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