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Searched refs:ADD256 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/lpc/
Dfsl_cdog.h102 CDOG->ADD256 = (secure_counter_t)0x1U; \
Dfsl_cwt.h98 CDOG->ADD256 = (secure_counter_t)0x1U; \
Dfsl_cwt.c145 base->ADD256 = (secure_counter_t)0x1U; in CWT_Add256()
Dfsl_cdog.c145 base->ADD256 = (secure_counter_t)0x1U; in CDOG_Add256()
/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_cdog.h102 CDOG->ADD256 = (secure_counter_t)0x1U; \
Dfsl_cdog.c145 base->ADD256 = (secure_counter_t)0x1U; in CDOG_Add256()
/hal_nxp-2.7.6/mcux/devices/LPC55S16/
DLPC55S16.h5478 …__O uint32_t ADD256; /**< Write address for issuing the ADD16 command.… member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
DMIMXRT1176_cm7.h24761 __O uint32_t ADD256; /**< ADD256 Command, offset: 0x38 */ member
DMIMXRT1176_cm4.h24758 __O uint32_t ADD256; /**< ADD256 Command, offset: 0x38 */ member