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Searched refs:ADC_SC3_ADCO_MASK (Results 1 – 22 of 22) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_adc16.c112 base->SC3 |= ADC_SC3_ADCO_MASK; in ADC16_Init()
116 base->SC3 &= ~ADC_SC3_ADCO_MASK; in ADC16_Init()
Dfsl_adc12.c161 tmp32 = (base->SC3 & ~ADC_SC3_ADCO_MASK); in ADC12_Init()
164 tmp32 |= ADC_SC3_ADCO_MASK; in ADC12_Init()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h474 #define ADC_SC3_ADCO_MASK (0x8U) macro
476 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h689 #define ADC_SC3_ADCO_MASK (0x8U) macro
695 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h512 #define ADC_SC3_ADCO_MASK (0x8U) macro
514 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h751 #define ADC_SC3_ADCO_MASK (0x8U) macro
757 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h512 #define ADC_SC3_ADCO_MASK (0x8U) macro
514 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h751 #define ADC_SC3_ADCO_MASK (0x8U) macro
757 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h751 #define ADC_SC3_ADCO_MASK (0x8U) macro
757 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h432 #define ADC_SC3_ADCO_MASK (0x8U) macro
434 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h735 #define ADC_SC3_ADCO_MASK (0x8U) macro
741 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h406 #define ADC_SC3_ADCO_MASK 0x8u macro
409 …O(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC3_ADCO_SHIFT))&ADC_SC3_ADCO_MASK)
DMKW40Z4_extension.h995 #define ADC_RD_SC3_ADCO(base) ((ADC_SC3_REG(base) & ADC_SC3_ADCO_MASK) >> ADC_SC3_ADCO_SHIFT)
999 #define ADC_WR_SC3_ADCO(base, value) (ADC_RMW_SC3(base, (ADC_SC3_ADCO_MASK | ADC_SC3_CALF_MASK), AD…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h431 #define ADC_SC3_ADCO_MASK (0x8U) macro
433 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h432 #define ADC_SC3_ADCO_MASK (0x8U) macro
434 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h406 #define ADC_SC3_ADCO_MASK 0x8u macro
409 …O(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC3_ADCO_SHIFT))&ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h406 #define ADC_SC3_ADCO_MASK 0x8u macro
409 …O(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC3_ADCO_SHIFT))&ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h947 #define ADC_SC3_ADCO_MASK (0x8U) macro
953 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h757 #define ADC_SC3_ADCO_MASK (0x8U) macro
763 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h947 #define ADC_SC3_ADCO_MASK (0x8U) macro
953 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h751 #define ADC_SC3_ADCO_MASK (0x8U) macro
757 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h711 #define ADC_SC3_ADCO_MASK (0x8U) macro
717 … (((uint32_t)(((uint32_t)(x)) << ADC_SC3_ADCO_SHIFT)) & ADC_SC3_ADCO_MASK)